Integrated circuit (IC) testing for quality assurance is approaching 50% of the manufacturing costs for some complex mixed-signal IC's. For many years the market growth and technology advancements in digital IC's were driving the developments in testing. The increasing trend to integrate information acquisition and digital processing on the same chip has spawned increasing attention to the test needs of mixed-signal IC's. The recent advances in wireless communications indicate a trend toward the integration of the RF and baseband mixed signal technologies. In this paper we examine the developments in IC testing form the historic, current status and future view points. In separate sections we address the testing developments for digital, mixed signal and RF IC's. With these reviews as context, we relate new test paradigms that have the potential to fundamentally alter the methods used to test mixed-signal and RF parts.

A test technique for the total harmonic distortion (THD) and signal to noise ratio (SNR) is proposed. A mod$ed Volterra series using harmonics in place of powers of the sinusoidal input is used to model the nonlinear characteristic of the device under test (DUT). The leastmean square (LMS) adaptive algorithm is used to identify the DUT model. While maintaining comparable accuracy this technique provides a more flexible test procedure than conventional methods, in terms of the frequency resolution, the number of samples, and the sampling rate. It outperforms conventional methods when there is a bin energy leakage, which occurs in a non-coherent system. It requires a lower number of data points, as a result, less data acquisition time is needed and test time is reduced. In addition, it is real-time computing while other conventional methods post-process blocks of data.