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In the present study a solderless interconnection and packaging technique for active components is presented. It is based on electroless copper deposition directly onto photodefined wiring tracks connecting the (I/O) pads of embedded active components. In this manner better electrical conductivity, higher reliability and accuracy of ultra finepitch interconnections in a low-cost multichip module are achieved. This non-vacuum and solderless copperjpolymer process which makes use of a photosensitive epoxy resin, has been used for interconnecting succesfully the pads as small as 30 x 30 pm'. It is emphasized that this solderless process enables the production of reliable electrical connections at ambient temperature without difficulties related to mechanical and thermal stability of very small solder joints. Detailed microstructural observations of interconnected test chips each containing 376 contact pads revealed good chemically bonded interfaces. The electrical performance of the embedded active components is also briefly discussed.

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The semiconductor industry is driving toward lead-free solder due to environmental concern and legislation requirement. The industry has also concluded that SnAgCu solder alloy so far is the best lead-free alternative to SnPb solder. Therefore, most existing and new packages will have to be tested and qualified using lead-free solder. One of the critical concerns is board level solder joint reliability during thermal cycling test. In this paper, the methodology for an absolute life prediction is described for virtual qualification of packages. A good absolute fatigue life prediction requires an appropriate solder creep model and actual test data on packages. Two new sets of lead-free Anand's constants for SnAgCu solder are introduced for creep models. These Anand's creep models are compared with other lead-free and eutectic solder model and the relative design trend is similar. A fatigue corrective factor is introduced to integrate the different solder models together for convenient relative design enhancement with acceptable range of absolute life prediction. These fatigue corrective factors can also be used to compare different finite element modeling assumptions such as element size and solution time step. Subsequently, design analysis is performed to study the effects of 11 key package dimensions and material properties. It is found that the relative design trend for packages with lead-free and eutectic solder is similar. Therefore, the design guidelines established for the previous eutectic solder is still valid for lead-free solder. IntroductionProduct manufacturers are usually concerned of board level solder joint reliability of BGAs during the thermal cycling tests. The typical thermal cycling condition required is -40°C to 125°C to ensure a reliable package performance under the extreme operating conditions. The required fatigue life varies among the customers.However, the process of thermal cycling test is timeconsuming and costly. Therefore, finite element modeling is widely used as an analysis tool for solder joint reliability , especially during the design stage of new package, due to the recent advances in high-speed computer and development of more sophisticated finite element models. There are many approaches used by researchers [36] in the modeling of fatigue life, e.g., stress-based, plastic/creep strain-based, energy-based, and damage accumulation-based. Darveaux methodology [34-35] is a common approach used in the fatigue modeling which applies both energy and damage accumulation-based theories. A life prediction accuracy of ±2x is generally considered adequate due to the complex nature of solder material's creep behavior, and also uncertainty in the board level thermal cycling test.