Summary Tunnel field effect transistors are used for ultra‐low power application since it is challenging to operate CMOS at very low supply voltage. As tunnel field effect transistor has a very low subthreshold slope due to band to band tunneling (BTBT) mechanism, it has the potential to operate at very low operating voltage. It is necessary that the devices utilized in implantable bio‐medical applications and Internet of Everything (IoE) need to consume very low power. This work presents an analysis of Dual Material Double Gate Tunnel Field effect transistor (DMDG‐TFET). An analytical two dimensional (2D) model has been developed to obtain the analytical expressions for drain current. The 2D Poisson's equation has been used to calculate surface potential in the silicon channel using the superposition approximation, as it considers the short channel effects in the calculation of the current when compared to parabolic approximation. To validate the model, analytical results have been confirmed by comparing with the Sentaurus TCAD simulation results. A reduced subthreshold slope of 31.2 mV/decade is obtained in this paper. It shows that DMDG TFET is a promising candidate for ultra‐low power applications. The subthreshold swing obtained using superposition approximation is more optimized than that of parabolic approximation technique.

An analytical two-dimensional (2D) model is developed to obtain expressions for various parameters of triple-material trigate junctionless tunnel field-effect transistors (TMTG-JTFETs). The 2D Poisson’s equation uses the superposition approximation method to calculate the sum of potentials arising from different point charges. The electric field distribution in the channel is obtained from the gradient of the electric potential. The drain current of the device is calculated using the Kane’s model in the presence of an electric field and a band structure. The TMTG-JTFET, with a channel length of 40nm, exhibits significant electrical characteristics with very low off-current (Ioff) and high on-current compared to a dual-material double-gate TFET. To validate the model, analytical results are confirmed via comparison with technology computer-aided design simulation results.