A decision diagram based framework is proposed for representing the probabilistic behavior of circuits with faulty gates. We introduce Probabilistic decision diagrams (PDD) as an exact computational tool which along with vast expressive power holds many other useful properties such as space efficiency (on average) and efficient manipulation algorithms (polynomial in size.)An algorithm for constructing the PDD for a circuit is proposed. Useful information about probabilistic behavior of the circuit (such as output error probability for arbitrary input probability distribution) can be directly extracted from the PDD representation.Experimental results demonstrate the effectiveness and applicability of the proposed approach.

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