Perturbation based nonlinearity pre-compensation has been performed for a 128 Gbit/s single-carrier dual-polarization 16-ary quadrature-amplitude-modulation (DP 16-QAM) signal. Without any performance degradation, a complexity reduction factor of 6.8 has been demonstrated for a transmission distance of 3600 km by combining symmetric electronic dispersion compensation and root-raised-cosine pulse shaping with a roll-off factor of 0.1. Transmission over 4200 km of standard single-mode fiber with EDFA amplification was achieved for the 128 Gbit/s DP 16-QAM signals with a forward error correction (FEC) threshold of 2 × 10(-2).
We have fabricated monolithic silicon avalanche photodiodes capable of 10 Gbps operation at a wavelength of 1550 nm. The photodiodes are entirely CMOS process compatible and comprise a p-i-n junction integrated with a silicon-on-insulator (SOI) rib waveguide. Photo-generation is initiated via the presence of deep levels in the silicon bandgap, introduced by ion implantation and modified by subsequent annealing. The devices show a small signal 3 dB bandwidth of 2.0 GHz as well as an open eye pattern at 10 Gbps. A responsivity of 4.7 ± 0.5 A/W is measured for a 600 µm device at a reverse bias of 40 V.
To combat chromatic dispersion (CD) in intensity modulation and direct detection (IM/DD) systems, three chirp-free demonstrations are experimentally performed with an iterative pre-electronic dispersion compensation (pre-EDC) algorithm at the transmitter end, for 28 GBaud non-return-to-zero on-off keying (NRZ-OOK), 56 GBaud NRZ-OOK and 28 GBaud four-level pulse-amplitude-modulation (PAM-4) signals, over distances of 100 km, 50 km and 40 km of single mode fiber (SMF), respectively. The iterative pre-EDC algorithm is based on the Gerchberg-Saxton (GS) algorithm, which treats the unconstrained phase at the direct detection receiver as a degree of freedom. At the receiver side, only a linear fractionally-spaced (T/2) post-feed-forward equalizer (post-FFE) is employed to combat the residual inter-symbol interference (ISI). Experimental results show that the aforementioned three demonstrations can approach the forward error correction (FEC) bit error rate (BER) threshold of 3.8 × 10−3 with (15 pre-EDC iterations and 5-tap post-FFE), (30 pre-EDC iterations and 15-tap post-FFE), and (10 pre-EDC iterations and 25-tap post-FFE), respectively. The results indicate the applicability of the pre-EDC algorithm in high-capacity IM/DD systems for transmission distances below 100 km of SMF.
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