The aim of this paper is to introduce a novel modeling method for the Proton exchange membrane full cell (PEMFC) based on the novel concept of “virtual prototyping” and to present a simple and accurate model of the cell performance by using the mixed-technology modeling language VHDL-AMS. This model describes the steady state and the dynamic behavior of a PEM fuel cell using its characteristic equations. The phenomenon of a charge double layer and the electrochemical parameters such as resistivity of membrane, concentration of hydrogen (oxygen) in catalytic interface of anode (cathode), and current density are considered in this modeling method. These parameters are adjustable and present a good solution to predict output voltage, efficiency, and output power of the PEMFC.

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In this paper, we present a new approach for complex system design, which allows rapid, efficient and low-cost prototyping. This approach can simplify designing tasks and go faster from system modeling to effective hardware implementation. Designing multi-domain systems requires different engineering competences and several tools, our approach gives a unique design environment, based on the use of VHDL-AMS modeling language and FPGA device within the same design tool. This approach is intended to enhance hardware-in-the-loop (HIL) practices with a more realistic simulation which improve the verification process in the system design flow. This paper describes the implementation of a software/hardware platform as a practical support for our approach, the feasibility and the benefits of this approach are demonstrated through a practical case study for power converter control. The obtained results show that the developed method achieves significant speed-up compared with conventional simulation, with a minimum used resources and minimum latency.

In this paper, a three-phase shunt active power filter (SAPF) controller with a fully digital implementation is presented. The main goal of this contribution is to implement a digital direct power control (DDPC) algorithm without phase-locked-loop (PLL) for SAPF. This algorithm is intended for power quality improvement and current harmonic elimination. The controller introduced in this paper is cost-effective, has a fast-dynamic response, and has a simple hardware implementation. In order to comply with the above specifications, a dedicated controller has been conceived and fully implemented within a field-programmable gate array (FPGA) device. This FPGA-based controller integrates the whole signal-processing functions needed to drive the SAPF, as well as an original method for sector identification. The intended controller provides the desired power references to select the optimal switching sequences. The switching orders follow the grid reference to drive the voltage source inverter (VSI), so the SAPF achieves good performances while ensuring balanced overall supply currents, unity power factor, and reduced harmonic load currents. The proposed digital implementation achieves a valuable compromise between fast dynamic response, minimum execution time, and reduced FPGA resources, through a simple hardware design implementation. The entire system is developed and simulated using VHDL and VHDL-AMS languages.

This paper presents a new approach for complex system design, allowing rapid, efficient and low-cost prototyping. Using this approach can simplify designing tasks and go faster from system modeling to effective hardware implementation. Designing multi-domain systems require different engineering competences and several tools, our approach gives a unique design environment, based on the use of VHDL-AMS modeling language and FPGA device within a single design tool. This approach is intended to enhance hardware-in-the-loop (HIL) practices with a more realistic simulation which improve the verification process in the system design flow. This paper describes the implementation of a software/hardware platform as effective support for our methodology. The feasibility and the benefits of the presented approach are demonstrated through a practical case study of a power converter control. The obtained results show that the developed method achieves significant speed-up compared with conventional simulation methods, using minimum resources and minimum latency.