Networks-on-chip provides benefits for improving distributed applications performance due to their intrinsic parallelism in communications. One promising direction for optimizing such architectures is the software defined paradigm, the software defined Networks on Chip (SDNoCs). In this approach, all routing controller mechanisms run as software in a central controller. This work proposes the optimization of SDNoCs by either exploring different routing strategies and varying the number of controllers. The approach suggests a significant improvement in communication latency by reducing the waiting time of packets in the controllers queue. The results obtained are promising. Applying Dijkstra and Branch-and-Bound algorithms and increasing the number of controller cores optimize communication latency in 100\% of the cases when compared to the XY routing strategy.