Trust in the integrated circuit (IC) fabrication industry is an ongoing concern given the trend towards "fabless" design and associated use of third-parties for fabrication. A Hardware Trojan (HT) introduced during fabrication can corrupt an IC's outputs, leak secret information, and yet go undetected by traditional system testing techniques. In this paper we propose an architecture to detect HTs during IC test or at run-time. An HT that would corrupt an IC's output and otherwise proceed undetected will then be rendered useless by this architecture. This approach will therefore discourage the insertion of HTs in the first place. The proposed architecture takes encryption hardware as a paradigmatic casestudy and uses digital "signatures" derived from the plaintext to identify if the ciphertext has been corrupted by HTs. We test this methodology through simulation on various types of HTs inserted into a lightweight cryptographic system called "PRESENT" [13]. Our results validate that activated HTs are detected by this methodology.
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