No abstract

This article presents a sub-6GHz ISM-band flexible wearable MIMO antenna array for wireless body area networks (WBANs) and biomedical telemetry devices. The array is based on metasurface inspired technology. The antenna array consists of 2×2 matrix of triangular-shaped radiation elements that were realized on 0.8 mm thick Rogers RT/duroid 5880 substrate. Radiation characteristics of the array are enhanced by isolating the surface current interaction between the individual radiators in the array. This is achieved by inserting an electromagnetic bandgap (EBG) decoupling structure between the radiating elements. The radiating elements were transformed into a metasurface by etching sub-wavelength slots inside them. The periodic arrangement of slots acts like resonant scatterers that manipulate the electromagnetic response of the surface. Results confirm that by employing the decoupling structure and sub-wavelength slots the isolation between the radiators is significantly improved (>34.8 dB). Moreover, there is an improvement in the array's fractional bandwidth, gain and the radiation efficiency. The optimized array design for operation over 5.0-6.6 GHz has an average gain and efficiency of 10 dBi and 83%, respectively. Results show that the array's performance is not greatly affected by a certain amount of bending. In fact, the antenna maintains a gain between 8.65-10.5 dBi and the efficiency between 77-83%. The proposed MIMO antenna array is relatively compact, can be easily fabricated on one side of a dielectric material, allows easy integration with RF circuitry, is robust, and maintains its characteristics with some bending. These features make it suitable for various wearable applications and biomedical telemetry devices.INDEX TERMS On-body antennas, wearable antennas, flexible antennas, metasurface (MTS) antennas, electromagnetic bandgap (EBG) devices, biomedical telemetry devices, wireless body area network (WBAN), MIMO antenna array.

In this paper, we present a comparison between two methods, the modified Loeffler algorithm (11 MUL and 29 ADD) and Distributed Arithmetic, to implement the DCT/IDCT algorithm for MPEG or H.26x video compression using VHDL description language. The implementation has been achieved on Altera Stratix EP1S10 FPGA which provides a dedicated DSP blocks required for common signal processing functions. A new solution based on this DSP blocks used for to implement multipliers for the modified Loeffler algorithm in order to optimize speed and area.

SummaryTwo main design methods are currently widely adopted in dealing with complex signal processing algorithms. The first method is based on low‐level synthesis (LLS), which consists in writing the hardware description languages (HDL) code manually. However, the second method, called high‐level synthesis (HLS), generates the register transfer level (RTL) description automatically starting from a high‐level description language. The challenge in this paper was to study the impact of both design methods on such a complex application as the High Efficiency Video Coding (HEVC) decoder. With this end in view, we analyzed the complexity of the HEVC decoder in a software environment using version 10 of the HEVC test model (HM) reference software to determine which portions tended to get optimized. The combined architecture for the intra prediction (IP) and the inverse quantization and transform (IQ/IT) was then implemented in hardware using HLS and LLS. The findings obtained under the Xilinx Zynq 7045‐based field‐programmable gate array (FPGA) proved that the HLS implementation enabled a gain of about 80% in Look Up Table (LUTs) with an increase of 93% in DSP blocks compared with LLS implementation. Yet only the LLS solution could achieve the real‐time decoding of 4K@26fps instead of the 1080p@24fps by the HLS design.