Corona Virus (COVID-19) could be considered as one of the most devastating pandemics of the twenty-first century. The effective and the rapid screening of infected patients could reduce the mortality and even the contagion rate. Chest X-ray radiology could be designed as one of the effective screening techniques for COVID-19 exploration. In this paper, we propose an advanced approach based on deep learning architecture to automatic and effective screening techniques dedicated to the COVID-19 exploration through chest X-ray (CXR) imaging. Despite the success of state-of-the-art deep learning-based models for COVID-19 detection, they might suffer from several problems such as the huge memory and the computational requirement, the overfitting effect, and the high variance. To alleviate these issues, we investigate the Transfer Learning to the Efficient-Nets models. Next, we fine-tuned the whole network to select the optimal hyperparameters. Furthermore, in the preprocessing step, we consider an intensity-normalization method succeeded by some data augmentation techniques to solve the imbalanced dataset classes’ issues. The proposed approach has presented a good performance in detecting patients attained by COVID-19 achieving an accuracy rate of 99.0% and 98% respectively using training and testing datasets. A comparative study over a publicly available dataset with the recently published deep-learning-based architectures could attest the proposed approach’s performance.
In this article we present a programmable current source architecture based on nine bits to modulate the charge quantity injected in the cochlear nerve ending. Our architecture is designed from a portable system to cochlear implant. In fact, the proposed architecture must be flexible and allows a transparency via the stimulation algorithms in order to satisfy the different pathological cases. The architecture which based on thermometer digital to analog converter presents a good linearity. As well, it is capable to generate a maximum current about 1 mA through a 1 K [1, 2] load, which is around the typical nerve impedance. The DAC currents sources have been seized to minimize power consumption, to reduce silicon occupation and to offer a worse case error around 0.08LSB differential linearity error and 0.4LSB integral linearity. This device is designed with a 0.35μm CMOS technology.
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