In this paper, we present a SoC design methodology joining the capabilities of UML and SystemC to operate at systemlevel. We present a UML 2.0 profile of the SystemC language exploiting the MDA capabilities of defining modeling languages, platform independent and reducible to platform dependent languages. The UML profile captures both the structural and the behavioral features of the SystemC language, and allows high level modeling of system-on-a-chip with straightforward translation to SystemC code.

This article summarizes our effort, since 2004 up to the present time, for improving the current industrial Systems-on-Chip and Embedded Systems design by joining the capabilities of the unified modeling language (UML) and SystemC/C programming languages to operate at system-level. The proposed approach exploits the OMG model-driven architecture-a framework for Model-driven Engineering-capabilities of reducing abstract, coarse-grained and platform-independent system models to fine-grained and platform-specific models. We first defined a design methodology and a development flow for the hardware, based on a SystemC UML profile and encompassing different levels of abstraction. We then included a multithread C UML profile for modelling software applications. Both SystemC/C profiles are consistent sets of modelling constructs designed to lift the programming features (both structural and behavioral) of the two coding languages to the UML modeling level. The new codesign flow is supported by an environment, which allows system modeling at higher abstraction levels (from a functional executable level to a register transfer level) and supports automatic code-generation/back-annotation from/to UML models.

Welcome to San Francisco and the 43rd Design Automation Conference! San Francisco is an excellent venue for DAC, with its proximity to many high-tech companies, its beautiful location, and a wide variety of activities and sights. DAC's return to San Francisco after eight years of absence promises a lively and especially well-attended event. Thousands of executives, managers, designers, academics, journalists, and others are converging here during DAC, the largest and most prestigious event focused on the design of electronic circuits and systems.The technical program, which received a record 865 regular paper submissions, includes hot topics such as low power, DFM, and ESL among many others. This year, it sees an increase in design papers and includes two new topics: beyond-the-die, and emerging technologies. Overall, the program contains more than 200 technical presentations in 11 tracks, eight technical program panels, seven special sessions, and seven fullday tutorials -all led by widely respected industry experts. Full-day tutorials are being held Monday and Friday, and cover a wide range of topics including DFM, verification, ESL, embedded systems, chip-package co-design, and test.DAC is highlighting a special MEGa theme -Multimedia, Entertainment, and Games -found throughout the program in all three keynotes, several pavilion sessions, and in a full day of technical sessions on Wednesday. Topics will range from issues faced in the design of the iPod, to technology requirements for 3D graphics in feature films, to power management for next-generation media applications. This promises to be an exciting part of the program as the topic is timely, exposes cutting-edge problems, and touches everyone's lives.Three keynote addresses will be held this year. Monday's keynote is Joe Costello, appearing nearly 10 years after leaving his post as Cadence's CEO. His recent endeavor has been serving as Chairman of Orb Networks, Inc., a company working to bring media to mobile devices, and his talk will focus on today's macro consumer trends. Tuesday's keynote is Hans Stork, Senior Vice President and CTO of Texas Instruments Inc., who brings a wealth of experience and knowledge in process technologies. He will address issues in the sub-50nm processes that enable SoCs in mobile communication devices of the future. On Thursday, DAC welcomes Alessandro Cremonesi, VP of Strategy and System Technology and General Manager of Advanced System Technology at STMicroelectronics, who has been leading ST's efforts in SoC design. He will deliver a keynote on the challenges of convergence -handling the increased complexity at the system, embedded software, and silicon implementation level.DAC has again organized Management Day to be held Tuesday, offering mid-and senior-level design managers a forum for sharing information on technology trends and decision-making processes.The exhibit floor is crowded and will be lively with more than 240 exhibitors. On the floor, be sure to visit the DAC pavilion which returns with a full schedule of 18...

In this paper we present a UML 2.0 profile for the SystemC language, which is a consistent set of modeling constructs designed to lift both structural and behavioral features (including events and time features) of the SystemC language to UML level. The main target of this profile is to provide a means for software and hardware engineers to improve the current industrial Systems-on-a-Chip (SoC) design methodology joining the capabilities of UML and SystemC to operate at system-level.

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