Nowadays, industries require reliable methods for accessing the instrumentations embedded within semiconductor devices. The situation led to the definition of standards, such as the IEEE 1687, for designing the required infrastructures, and the proposal of techniques to test them. So far, most of the test-generation approaches are either too computationally demanding to be applied in complex cases, or too approximate to yield high-quality tests. This paper exploits a recent idea: the state of a generic reconfigurable scan chain is modeled as a finite state automaton and a low-level fault, as an incorrect transition; it then proposes a new algorithm for generating a functional test sequence able to detect all incorrect transitions far more efficiently than previous ones. Such an algorithm is based on a greedy search, and it is able to postpone costly operations and eventually minimize their number. Experimental results on ITC'16 benchmarks demonstrate that the proposed approach is broadly applicable; has limited computational requirements; and the test sequences are order of magnitudes shorter than the ones previously generated by approximate methodologies.
In last years, the Internet of Things (IoT) has gained attention in relevant fields of application as Industry 4.0. IoT is usually structured around three layers according to computing capacity and energy cost: cloud, fog, and edge. This paper focuses on the edge layer which is close to the end-user. Specifically, the authors fully address a binary image classification problem in the edge without going toward upper layers, i.e., the intelligence and the computation is brought to the edge layer, instead of being simple sensing devices. To this end, the authors propose a cascade Support Vector Machine (SVM) embedded implementation specially designed to be executed within a low-cost FPGA, which could be embedded in an IoT edge device. The experimental results performed show the feasibility and correct functionality of the proposal when comparing to a regular computer.
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