Accelerating inexact string matching procedures is of utmost importance when dealing with practical applications where huge amount of data must be processed in real time, as usual in bioinformatics or cybersecurity. Inexact matching procedures can yield multiple shadow hits, which must be filtered, according to some criterion, to obtain a concise and meaningful list of occurrences. The filtering procedures are often computationally demanding and are performed offline in a post-processing phase. This paper introduces a novel algorithm for Online Approximate String Matching (OASM) able to filter shadow hits on the fly, according to general purpose priority rules that greedily assign priorities to overlapping hits. An FPGA hardware implementation of OASM is proposed and compared with a serial software version. Even when implemented on entry level FPGAs, the proposed procedure can reach a high degree of parallelism and superior performance in time compared to the software implementation, while keeping low the usage of logic elements. This makes the developed architecture very competitive in terms of both performance and cost of the overall computing system.

Many industrial applications concerning pattern recognition techniques often demand to develop suited low cost embedded systems in charge of performing complex classification tasks in real time. To this aim it is possible to rely on FPGA for designing effective and low cost solutions. Among neurofuzzy classification models, Min-Max networks constitutes an interesting tool, especially when trained by constructive, robust and automatic algorithms, such as ARC and PARC. In this paper we propose a parallel implementation of a Min-Max classifier on FPGA, designed in order to find the best compromise between model latency and resources needed on the FPGA. We show that by rearranging the equations defining the adopted membership function for the hidden layer neurons, it is possible to substantially reduce the number of logic elements needed, without increasing the model latency, i.e. without any need to lower the classifier working frequency.

As Internet traffic grows rapidly, it is necessary to monitor and control TCP/IP flows in order to ensure the quality of service and to filter out unwanted traffic by automatic, effective and inexpensive technical solutions. To this aim, especially when dealing with Gbit/s links, real time TCP/IP traffic classification can be performed by dedicated high speed processing devices, avoiding computationally expensive deep packet inspection techniques and relying only on packet features independent of payload content. In this paper we propose to employ an FPGA to design a stand-alone device using only information available at network layer, namely packet sizes, directions and inter-arrival times, to perform flow classification according to application layer protocol (such as HTTP, FTP, SSH, POP3, etc.). The classification system is based on neurofuzzy Min-Max networks, trained by Adaptive Resolution procedures (ARC and PARC algorithms). In order to deal with very high speed links and a large amount of concurrent traffic flows, we propose a complete FPGA targeted implementation of the whole system. Our design is intended to place on a single FPGA all the needed components, including the neurofuzzy Min-Max classifier. The paper describes in detail some interesting technical solutions aiming at optimizing both FPGA working frequency and circuit complexity © 2013 IEEE

Classification systems specifically designed to deal with fully labeled graphs are gaining importance in many application fields. The main computational bottleneck in such systems is the dissimilarity measure between pairs of graphs. In this paper we propose to accelerate in hardware such computations, relying on the Graph Coverage as the core inexact graph matching procedure, targeting the design to FPGA as an inexpensive way to design specific co-processing devices. A comparison in terms of computational time between the proposed system and a software implementation on a standard workstation shows encouraging results.