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A resolution-improved active millimeter-wave (MMW) imaging structure, based on the theory of structured illumination, is proposed in this paper. The structured illumination is a well-defined concept for surpassing the diffraction limit in optical microscopy, where imposing grating patterns on the targeted object could help in moving the object frequency spectrum along the desired direction in the spatial frequency domain. This frequency shift helps in passing different parts of the object's frequency spectrum through the diffraction filter. The combination of resultant images provides a framework to pass a wider frequency band of the object, thereby achieving super-resolution. This idea has not yet been employed for MMW image resolution improvement due to practical limitations in producing the desired grating patterns. Therefore, a desired fringe pattern is produced here and tailored for a MMW imaging system through antenna array synthesis. In the proposed scheme, the structured illumination has been implemented for improving the MMW image resolution. Furthermore, an adaptive approach has been proposed in order to generalize the structure for resolution improvement in all required directions in a very fast manner. Electromagnetic simulation results show at most twofold improvement in the image resolution through the proposed MMW imaging structure.

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Monitoring the respiratory signal is crucial in many medical applications. Traditional methods for the respiration measurement are normally based on measuring the volume of air inhaled and exhaled by lungs (like spirometer) or oxygen saturation in blood. However, these methods have numerous challenges including their high cost and not being accessible in some cases. In this paper, an algorithm for deriving the respiratory signal from ECG signal is proposed, which is based on other proposed algotithms. This algorithm uses the cubic spline interpolation (CSI) of R-waves in ECG to derive the respiratory signal.The CSI algorithm is made efficient with respect to ECG features in order to reduce the latency and the complexity of calculations. In addition, a hardware architecture for real-time and low-power processing is implemented. This architecture is synthesized using 180nm process and consumes 817μW . The FPGA tests are also performed on Xilinx Virtex-6 platform.