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In order to resolve the causality dilemma of which comes first, accurate design rules or real designs, this paper presents a flow for exploration of the layout design space to early identify problematic patterns that will negatively affect the yield.A new random layout generating method called Layout Schema Generator (LSG) is reported in this paper, this method generates realistic design-like layouts without any design rule violation. Lithography simulation is then used on the generated layout to discover the potentially problematic patterns (hotspots). These hotspot patterns are further explored by randomly inducing feature and context variations to these identified hotspots through a flow called Hotspot variation Flow (HSV). Simulation is then performed on these expanded set of layout clips to further identify more problematic patterns.These patterns are then classified into design forbidden patterns that should be included in the design rule checker and legal patterns that need better handling in the RET recipes and processes.

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The Design Rule Manual (DRM) is a critical component in the introduction and release of new technology nodes. It is the reference manual of definitive requirements, documented in detail, on all information regarding design rules and technology node design requirements. The DRM is a contract between the foundry and the designer. Designs must meet all documented requirements to be accepted for manufacture. The DRM’s critical role in process design enablement obligates it to a very high quality standard. The DRM must be accurate, reliable, and clear of ambiguity. Qualification of the DRM is crucial as design rules become extremely complex with advancing technology. DRM teams must ensure all descriptions and figures are correct and clear versus target requirements from the beginning of the technology development stage. The qualification process should cover all typical cases as well as corner and unexpected cases. Traditional methods of targeted pattern creation leave gaps in ensuring a high quality DRM. Those methods often miss complex scenarios leading to incomplete DRM documentation or descriptions with vague ambiguity. Ambiguity in the DRM leads to improper DRC rule coding, resulting in erroneous DRC checking. This paper presents a synthetic pattern/layout generation approach to high quality and high coverage DRM and DRC qualification. The generated patterns flow into a post-generation-analysis-fix step that helps discover and analyze issues while initial design rules and DRC code is being developed. Guided random generation of legal layout patterns produces simple and complex pattern configurations to challenge the accuracy and consistency between the original intention of the complex design rules and DRC rule deck. The post-generation-analysis-fix step helps identify locations of potential discrepancy. Flushing out these discrepancies and ambiguities drives enhancements to converge on robust DRM documentation and consistency between design rule intent and DRC run set implementation from early development throughout the life cycle of process node deployment.