Cardiovascular diseases currently pose the highest threat to human health around the world. Proper investigation of the abnormalities in heart sounds is known to provide vital clinical information that can assist in the diagnosis and management of cardiac conditions. However, despite significant advances in the development of algorithms for automated classification and analysis of heart sounds, the validity of different approaches has not been systematically reviewed. This paper provides an in-depth systematic review and critical analysis of all the existing approaches for automatic identification and classification of the heart sounds. All statements on the Preferred Reporting Items for Systematic Reviews and Meta-Analyses 2009 Checklist were followed and addressed thoroughly to maintain the quality of the accounted systematic review. Out of 1347 research articles available in the academic databases from 1963 to 2018, 117 peerreviewed articles were found to fall under the search and selection criteria of this paper. Amongst them: 53 articles are focused on segmentation, 72 of the studies are related to the feature extraction approaches and 88 to classification, and 56 reported on the databases and heart sounds acquisition. From this review, it is clear that, although a lot of research has been done in the field of automated analysis, there is still some work to be done to develop robust methods for identification and classification of various events in the cardiac cycle so that this could be effectively used to improve the diagnosis and management of cardiovascular diseases in combination with the wearable mobile technologies.

This paper proposes a circuit capable of incorporating buffered delays in the order of picoseconds. To study our proposed circuit in the profound way, we have also explored our proposed circuit using emerging technologies such as FinFET and CNFET. Comparisons between these technologies have been made in terms of different parameters such as duration of incorporated delays (pulse width) and its variability with supply voltages. Further, this paper also proposes a trigger pulse generator by utilizing proposed buffered delay circuit as its basic element. Parametric results obtained for the proposed trigger pulse generator match different application specific requirements. These applications are also mentioned in this paper. The proposed trigger pulse generator requires very low supply voltage (700 mV) and also proves its effectiveness in terms of tunability of pulse width of the generated pulses. The modeling of the circuit has been done using Verilog and the simulation results are extensively verified using SPICE.

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