No abstract

The satellite digital audio radio system (SDARS) is a satellitebased transmission system that includes geo-stationary satellites. For urban centers, where satellite reception is poor or not available, terrestrial repeaters are deployed for coverage reinforcement. The signals that are transmitted from the satellites are in QPSK format; the terrestrial repeater network receives the signals from a satellite, and re-transmits them after reformatting to multi-carrier modulation (MCM). SDARS supports several application fields (automotive, home stereo, etc.). Each receiver type has specific requirements linked to their environmental and physical constraints. The stringent performance specifications, required to guarantee the necessary selectivity and immunity from interferers, usually call for a robust architecture for the radio section. In addition, in modern mobile communications, system solutions capable of achieving high performance, high levels of integration, and low cost are preferred. The proposed monolithic receiver complies with these requirements because all critical blocks are integrated and it requires few inexpensive external passive components.The receiver [1] is based on a super-heterodyne architecture and uses a fully differential approach. A block diagram of the receiver is shown in Fig. 23.6.1. It includes two RF and IF down-conversion paths and synthesizers, a crystal oscillator, an active antenna bias circuitry and over current protection, and the I2CBUS interface. The LO signal for the RF and IF image-reject mixers (IRMs), at 2.4GHz and 120MHz, respectively, come from two fully integrated VCOs, with oscillation frequency of 4.8GHz and 960MHz, respectively. Frequency dividers provide the I and Q quadrature signals to each mixer.The RF front-end includes a variable-gain low-noise amplifier (VGLNA), a programmable-gain IRM and an a class AB highly linear buffer, that is able to drive different SAW filters; the IC also provides on chip RF AGC control, in order to protect the following stages from strong interferers. The VGLNA is able to manage signals with a high dynamic range (from -90 to 0dBm), without degrading the SNR. It must have a very low noise figure (NF) at maximum gain and a good linearity (high IIP3) at minimum gain, maintaining good input matching. The proposed solution, depicted in Fig. 23.6.2, is based on a common emitter cascode feedback structure Q1-Q2-Q3-Q6, in which, the gain variation is obtained by increasing the emitter degeneration and concurrently reducing the load resistance through the current steering Q4-Q5, while the input matching is maintained by adjusting the input impedance. IRM [2] is constituted of two Gilbert cells (Fig. 23.6.3) and a 3 rd -order polyphase filter [3]. In order to maximize the linearity, the tail current generator is avoided, and to achieve a software programmable gain, the collector resistor R C has been split into four resistors (to obtain four different gains). This allows external SAW filters with different insertion losses, avoiding noise and lin...