In recent years, promising results have been reported with the vibrating intrinsic reverberation chamber (VIRC) combining performance and cost-efficiency for electromagnetic compatibility (EMC) measurements. This also makes it a potentially attractive solution for over-the-air (OTA) testing, which is yet to be investigated. Therefore, this article proposes the first systematic and thorough methodology to characterize the VIRC for use in EMC and OTA testing of wireless baseband algorithms of narrowband single-input single-output channels. This methodology has been developed to measure and estimate the channel first-and second-order temporal and spectral characteristics taking into consideration the effect of different carrier frequencies, rotational speeds of VIRC motors, and loading conditions. It is then applied to a channel setup inside a VIRC for a preliminary investigation before the VIRC itself is fully characterized. It is shown that mounting an absorber in a specific location on the hatch significantly improves the rejection rate of the chi-squared goodness-of-fit test for Rician distribution without increasing the K-factor above −10 dB over the frequency range 755-2740 MHz in the VIRC under investigation. However, the proposed methodology has been devised to be universal to any reverberation chamber, and the obtained results can be used to improve EMC testing due to the better understanding of the unique VIRC environment.

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Abstract-Cognitive Radio has been proposed as a promising technology to solve today's spectrum scarcity problem. Cognitive Radio is able to sense the spectrum to find the free spectrum, which can be optimally used by Cognitive Radio without causing interference to the licensed user. In the scope of the Adaptive Adhoc Freeband (AAF) project, an emergency network built on top of Cognitive Radio is proposed. New functional requirements and system specifications for Cognitive Radio have to be supported by a reconfigurable architecture. In this paper, we propose a heterogenous reconfigurable System-on-Chip (SoC) architecture to enable the evolution from the traditional software defined radio to Cognitive Radio.

Approximate computing studies the quality-efficiency trade-off to attain a best-efficiency (e.g., area, latency, and power) design for a given quality constraint and vice versa. Recently, self-healing methodologies for approximate computing have emerged that showed an effective quality-efficiency tradeoff as compared to the conventional error-restricted approximate computing methodologies. However, the state-of-the-art self-healing methodologies are constrained to highly parallel implementations with similar modules (or parts of a datapath) in multiples of two and for square-accumulate functions through the pairing of mirror versions to achieve error cancellation. In this paper, we propose a novel methodology for an internal-self-healing (ISH) that allows exploiting self-healing within a computing element internally without requiring a paired, parallel module, which extends the applicability to irregular/asymmetric datapaths while relieving the restriction of multiples of two for modules in a given datapath, as well as going beyond square functions. We employ our ISH methodology to design an approximate multiply-accumulate (xMAC), wherein the multiplier is regarded as an approximation stage and the accumulator as a healing stage. We propose to approximate a recursive multiplier in such a way that a near-to-zero average error is achieved for a given input distribution to cancel out the error at an accurate accumulation stage. To increase the efficacy of such a multiplier, we propose a novel 2 × 2 approximate multiplier design that alleviates the overflow problem within an n × n approximate recursive multiplier. The proposed ISH methodology shows a more effective quality-efficiency trade-off for an xMAC as compared with the conventional error-restricted methodologies for random inputs and for radio-astronomy calibration processing (up to 55% better quality output for equivalent-efficiency designs).

The issue of frequency offset in low data rate, narrowband and low power communication nodes is considered in this paper. To avoid power hungry precise frequency generation, offset tolerant demodulation and detection schemes are investigated. A Short-Time DFT (ST-DFT) based detection for BFSK is introduced which improves the BER performance of an existing design by almost 1dB. Its BER performance and complexity are also compared to frequency offset tolerant DDBPSK demodulation. Additionally, the effect of wider filter required to capture signal in presence of frequency offset is considered. The trade-off between performance and complexity for different offset values and filter bandwidths is discussed. Both methods work independent of frequency offset; however, it is shown that wider filters do not affect ST-DFT BER performance in contrast with DDBPSK. This robustness is obtained at the expense of increased computational load.