A monolithic two-terminal perovskite/silicon tandem solar cell based on an industrial, high temperature tolerant p-type crystalline silicon bottom cell with a steady-state power conversion efficiency of 25.1% is demonstrated. Crystalline silicon (c-Si) solar cells dominate the photovoltaics (PV) market due to their high efficiencies, low manufacturing costs and long-term stability, overall enabling a competitive levelized cost of electricity (LCOE). Today the main driver for further cost reduction is improving efficiencies, which requires innovative strategies as the conversion efficiency of single junction c-Si solar cells is inherently limited to 29.4% 1. The most promising solution to surpass this limit relies on stacking semiconductors with different bandgaps on top of each other in a multi-junction cell architecture that reduces thermalization losses. However, up to now, no high-efficiency multi-junction technology has shown the potential to achieve a competitive LCOE. Perovskite solar cells may change this scenario as their high spectral response at low wavelengths, low-cost potential and high initial performance of up to 23.7% at the single-junction level 2 make them the ideal partner to c-Si cells in multi-junctions. By adding a perovskite top cell through only a few additional process steps, c-Si technologies have the potential to be upgraded to >30%. So far all of the reported perovskite/silicon tandem devices with an efficiency >25% feature an n-type c-Si heterojunction (SHJ) as bottom cell. Despite their record efficiencies, the choice of SHJ bottom cells has some drawbacks. First, SHJ cells degrade when experiencing processing temperatures >250°C, which limits the choice of carrier-selective contacts that can be used below the perovskite absorber. Second, high-quality wafers are required to achieve high efficiencies as the processing temperature of SHJs is too low to trigger any wafer improvement process (impurity gettering or deactivation of thermal donors). In fact, the vast majority of manufactured c-Si cells (>90%) relies on high temperature fabrication processes, enabling at the same time junction/contact formation as well as bulk-material improvement and hence

As highlighted by recent conversion efficiency records, passivating contacts are keys to fully exploit the potential of crystalline silicon as a light absorbing semiconductor. Prime passivating contact technologies include a-Si/c-Si silicon heterojunctions and high temperature tunnel oxide/polysilicon-based contacts. The first has the advantage of a simple fabrication process, but it is incompatible with standard metallization processes and bulk semiconductor defect treatments which take place at temperature > 800°C. The second relies on a buried junction or dopant profile near the tunnel oxide, and requires process times of several minutes at high temperature. In this paper, we solve the scientific question to know whether such a dopant profiles, with the possible the presence of nano-holes, is required to make an efficient contact when using a tunnel oxide. We show that, by leveraging the versatility of plasma deposition processes, it is possible to realize Si-based thin-film doped layers that withstand a short annealing at high temperature (> 800 for typ 10 s, called "firing"), passivate the c-Si interface and foster collection of photo-generated charge carriers by inducing a strong electric field at the Si-surface near the interface with SiOx. The contact has a high-compatibility with existing industrial process: a plasma deposition of a thin-film layer at the rear side followed by a rapid thermal treatment ("firing"), an essential process for metallization formation of industrial cells. With the developed technology, we fabricated proof-of-concept p-type solar cells with conversion efficiency up to 21.9%.

The experimental demonstration of the 4n 2 classical absorption limit in solar cells has been elusive for the last 30 years. Especially the assumptions on front and internal rear reflectance in a slab of absorbing material are not easily fulfilled unless an appropriate light-trapping scheme is applied. We propose an advanced metal-free light-trapping scheme for crystalline silicon wafers. For different bulk thicknesses, at the front side of the wafers we applied a nanotexture known as black-silicon. At the rear side, we implemented a random pyramidal texture coated with a distributed Bragg reflector. Such a dielectric back reflector was designed to exhibit a maximized omnidirectional internal rear reflectance in the region of weak absorption of crystalline silicon. Integrating the measured absorptance spectra of our wafers with the reference solar photon flux between 400 and 1200 nm, we could calculate the so-called implied photogenerated current densities. For wafers thinner than 35 μm, we achieved more than 99% and up to 99.8% of the implied photogenerated current density based on the theoretical 4n 2 classical absorption limit. Successful implementation of our maskless and metal-free light-trapping scheme in crystalline silicon solar cells requires the adequate surface passivation of the front nanotexture. For this purpose we used thermal silicon oxide, but we discuss also the usage of aluminum oxide. Our findings, applied in a solar device structure where front side losses are minimized, open the way for the realization of next-generation high-efficiency, cost-effective, and ultrathin crystalline silicon solar cells.

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The front-side reflection represents a significant optical loss in solar cells. One way to minimize this optical loss is to nanotexture the front surface. Although nano-textured surfaces have shown a broad-band anti-reflective effect, their light scattering and surface passivation properties are found to be generally worse than those of standard micro-textured surfaces. To overcome these setbacks in crystalline silicon solar cells, advanced texturing and passivation approaches are here presented. In the first approach, we propose a modulated surface texture by superimposing nano-cones on micro-pyramidal surface texture. This advanced texture applied at the front side of crystalline silicon wafers completely suppresses the reflection in a broad wavelength range from 300 nm up to 1000 nm and efficiently scatters light up to 1200 nm. In the second approach, we show a method to minimize recombination at nano-textured surfaces by using defect-removal etching followed by dry thermal oxidation. These two approaches are applied here in an interdigitated back-contacted crystalline silicon solar cell and result in decoupling of the interplay between the mechanisms behind short-circuit current density and open-circuit voltage. The device exhibits a conversion efficiency equal to 19.8%, record external quantum efficiency (78%) at short wavelengths (300 nm), and electrical performance equal to the performance of the reference interdigitated backcontacted device based on front-side micro-pyramids.