Physical unclonable functions (PUFs) are excellent candidates to generate secret information on-chip without the need for secure storage. Ring-oscillator (RO) based PUFs have been receiving great attention over the years due to their easy design and superior statistical characteristics on field programmable gate arrays (FPGAs). Although previous work has improved their statistical measures and provided deeper insights, there are still gaps to be filled. Therefore, this work presents an in-depth analysis of RO-PUFs on Xilinx Zynq-7000 FPGAs with a framework based on partial reconfiguration. This approach allows for full-chip characterization of 100% of the targeted area. Based on the measured data and beforehand estimated routing delay, we will show how to identify and avoid potential bias in the final PUF placement. By utilizing DSP48 slices, an enhanced counter was designed for high-frequency measurements. A second feedback path was added to the ring-oscillators in order to avoid glitches at the counters input. In combination with a reference normalization, the frequency standard deviation could be reduced to 0.0229% at a much shorter evaluation time of 10µs compared to the state-of-the-art, while maintaining the maximum inter-hamming distance. An investigation on the influence of spatial distribution on different RO pairings was performed. The chip variations were found to have a much larger effect on the statistical measures than the difference between logic elements. The measurement data and the framework will be made accessible to interested researchers to provide them with a data basis for further research.

Physical Unclonable Functions (PUFs) offer the possibility for on-chip generation of unique fingerprints for integrated circuits. Ring-oscillator (RO) PUFs are small and easy to configure on Field Programmable Gate Arrays (FPGAs) and thus received great attention over the years. In the state-of-the-art two neighboring ROs are compared and mapped to only a single bit of information. Few publications aims to extract more bits out of one PUF-cell, but struggle with non-uniform distributions. In this work multi-valued symbol extraction is presented as a method to extract more bits of information out of each individual RO. A new post-processing approach is introduced to produce close-to-ideal uniformly distributed responses independent of the underlying physically probability distribution. To eliminate bias, caused by placement inequalities, multiple methods of normalization are utilized and analyzed by means of area and complexity. Based on metrics for symbol transmission, the Euclidean-distance and entropy are used as metrics to evaluate the uniqueness and reliability of multi-valued PUFs. This new approach allows to increase the amount of extracted information to 3 bits per RO.

Like every integrated circuit, Arbiter-PUFs suffer from any ambience variations such as electrical noise, supply voltage variations and temperature fluctuations. In this work, we show that most bit-errors are related to small phase differences, for which noise dominates the readout bit value. We present an approach eliminating this influence by modifying the arbitration circuit part into an eye-opening oscillator. By utilizing the deadzone of two D-Flip-Flops, the decision about the response is delayed until the phase difference becomes significant enough. With this modification, we could increase the PUFs initial biterror rate of 3.31% to almost zero. We also highlight important design choices for this solution, like the setup-time of the D-Flip-Flops and the minimum number of enforced oscillations.

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