Noncoherent UWB receivers promise low power consumption and low processing complexity but their peak data rate is limited by the delay spread of the multipath radio channel. A recently proposed multichannel autocorrelation receiver (AcR) can break this rate limit due to its multicarrier signal demodulation capability. In this paper, the hardware implementation of this receiver architecture is addressed. We focus on the multiplication device, which is a core part of the AcR and introduces strong interference due to nonlinear effects. To analyze the signal-tointerference ratio performance of the receiver system, a combined Wiener-Hammerstein system model of the multiplication device is introduced. It is shown that the receiver performance strongly depends on the input power of the nonideal multiplier devices.
Digital IIR filter implementations are important building blocks of most communication systems. The chosen number format (fixed-point, floating-point; precision) has a major impact on achievable performance and implementation cost. Typically, filter design for communication systems is based on filter specifications in the frequency domain. We consider IIR filter design as an integral part of communication system optimisation with implicit filter specification in the time domain (via symbol/bit error rate). We present a holistic design flow with the system's bit error rate as the main objective. We consider a discrete search space spanned by the quantised filter coefficients. Differential Evolution is used for efficient sampling of this huge finite design space. We present communication system performance (based on bit-true simulations) and both measured and estimated receiver IIR chip areas. The results show that very small number formats are acceptable for complex filters and that the choice between fixed-point and floating-point number formats is nontrivial if precision is a free parameter.
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