A novel wideband down‐conversion mixer is proposed for multi‐standard wireless applications between 100 MHz and 2.5 GHz. A transconductance stage with two pairs of compensatory transistors is adopted for high linearity. Differing from the ordinary differential multi‐gated transistor technique utilised in Gilbert mixer, the design proposed concerns about both gm″ and gm compensation of the transconductance stage in order to improve both input‐referred third‐order intercept point (IIP3) and 1 dB gain compression point (CP1 dB). Realising in Taiwan Semiconductor Manufacturing Company (TSMC) 180 nm RF CMOS process, the mixer provides a gain of 8.9 dB, a maximum IIP3 of 5.8 dBm, a maximum CP1 dB of −4 dBm and a minimum noise figure (NF) of 9.6 dB.

A wideband single-ended input, differential output balun-LNA is proposed for multi-standard wireless applications between 10 MHz and 3 GHz. The common-gate (CG) input stage in combination with a noise cancellation topology is adopted for wideband input matching and low-noise figure. An output stage with g m ″ compensation technique is utilised to promote the limited gain of the CG input stage, and obtain an optimised linearity performance. Realised in TSMC 180 nm RF CMOS process, the LNA provides a gain of 19.7 dB, a maximum input third-order interception point of 1.13 dBm, and a minimum NF AQ1 of 1.93 dB over a 3 dB bandwidth from 10 MHz to 1.7 GHz. Meanwhile, the proposed LNA shows good measured performance over the frequency band of 1.7-3 GHz.

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Software-defined radio (SDR) is a good solution for complying with the existing and incoming protocols for emerging wireless sensor networks (WSN) and internet of things (IoT) applications. The frequency synthesizer in a SDR tranceiver usually consists of a phase locked loop (PLL) and a post synthesizer. The PLL is the narrow band signal source and the post synthesizer generates wideband outputs by mixing and dividing. Compared with a frequency synthesizer utilizing the wideband PLL, this synthesizer features relatively constant loop parameters and mitigates the requirement for the oscillator. In this paper, a quadrature single side-band (QSSB) mixer with the proposed passive negative resistance (PNR) for frequency mixing in a post synthesizer is presented. The PNR is achieved by biasing the Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFET) of the cross-coupled pair at the deep-triode region periodically and incorporates an inductor and a cap-array as the mixer load. Compared with the traditional single side-band mixers utilizing Inductor-Capacitor (LC) resonant loads or quality factor enhanced (Q-enhanced) LC resonant loads, which suffer from a selectivity versus working range trade-off, the mixer employing the proposed loading structure provides not only a wide operating range, but also a superior image side-band rejection ratio (ISRR). Moreover, the oscillating risk in conventional mixers adopting Q-enhanced LC resonant loads is eliminated. A wideband frequency synthesizer employing the proposed mixer was implemented in a TSMC 0.18 µm CMOS process and the mixer performed ISRR of 40–57 dB and 30–57 dB across 2.5–3 GHz and 2.3–3.2 GHz, respectively. The power consumption of the QSSB mixer, including buffer, is 18 mA from a 1.8 V supply and the active area is 0.445 mm2. The measurement results provide validation that the proposed QSSB mixer is suitable for wideband software-defined frequency synthesizers and other frequency generating systems.

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