The epitaxial graphene growth at the 4H-SiC(0001) surface with intentionally inserted step-free basal plane regions was performed by high temperature annealing in the range of 1600-1900 C under ultrahigh vacuum. For fabricating inverted-mesa structures with the step-free regions at SiC surfaces, a combined process consisting of a direct laser digging and a Si-vapor etching at 1900 C was utilized. The graphitized surfaces were characterized by atomic force microscopy, low acceleration voltage (0.1-1.0 kV) scanning electron microscopy and Raman spectroscopy. It was found that the graphene thickness at the SiC step-free surface tends to be suppressed compared with the thickness at background SiC stepterrace surfaces where the steps are intrinsically introduced from intentional/unintentional substrate miscut angles. From the characterization by Raman mapping, 1 ML graphene was obtained at the SiC step-free surface at 1600 C graphitization in contrast to the case that multilayer graphene was grown at SiC step-terrace surfaces.
We report a new approach to produce high quality epitaxial graphene based on the concept of controlling Si sublimation rate from SiC surface. By putting a mask substrate to suppress Si sublimation from the SiC surface in ultrahigh vacuum, epitaxial graphene growth at 4H-SiC (0001) was locally controlled. Spatially graded surface graphitization was confirmed in a scanning electron microscopy contrast from the outside unmasked region to the inside masked region. The contrast was discussed with Raman characterization as the increase of graphene thickness and the surface compositional change of SiC. Results indicate two types of growth processes of epitaxial graphene at 4H-SiC (0001) step-terrace structures.
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