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A sampling algorithm to immunize digital control power converters with triangular carrier waveforms against switching noise is introduced. Many converter circuits employ a sawtooth carrier waveform; however, no optimal sampling method has been presented that avoids switching noise. As demonstrated by the experiments conducted in this research, there are cases where converter circuits are not correctly controlled and sample values are affected by switching noise via current sensors or AD converters. As a result, the output is unstable and inaccurate thus reducing the reliability of the converter.This paper proposes an adaptive sampling method for a digital control current-mode power converter circuit on an FPGA (Field Programmable Gate Array) with the PWM (Pulse Width Modulator) sawtooth carrier waveform. To avoid noise overshoot and undershoot during the MOSFET's switching process, the sampling timing of the AD converter is adaptively tuned according to the duty ratio of each switching cycle. We further introduce a random phase noise generator, to conduct simulations as realistic as practical experiments. We also present simulation and experimental results of the proposed methodology illustrating cases of successful noise avoidance. Thus, we verify that the proposed sampling method improves the reliability of power converter circuits.

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