Thermal Interface Materials (TIMs) are widely used in the microelectronics industry to adequately expel the waste heat generated in the chips, by reducing the contact resistance between the chip and the heat sink. A critical need in developing these TIMs is apriori modeling using fundamental physical principles to predict the effect of particle volume fraction and arrangements on effective behavior. Such models will enable one to optimize the structure and arrangement of the material. The existing analytical descriptions of thermal transport in particulate systems under predict (as compared to the experimentally observed values) the effective thermal conductivity since these models do not accurately account for the effect of inter-particle interactions, especially when particle volume fractions approach the percolation limits of approximately 50% -60%. Another crucial drawback in the existing analytical as well as the network models is the inability to model random size distributions of the filler material particles, which is what one obtains when particulates are produced. While full-field simulations (using the finite element method) are possible for such systems, they are computationally expensive. In the present paper, we develop efficient network models that capture the inter-particle interactions and also allow random size distributions. Fifteen microstructural arrangements of alumina as well as aluminum particles in silicone matrix were first experimentally characterized. Microstructures that are representative of the experimentally tested systems were simulated using a drop-fallshake algorithm implemented in java.Thirty such microstructural arrangements were evaluated through both full field simulations as well as the network models. In all cases, it is shown that the full-field simulations of effective behavior are accurate to within 10% of the experimentally measured values and the random network models are accurate to within 10% of the full field simulations. The random network models were efficient since they required a few minutes to run, while the full field simulations required 4-5 hours on an average to complete.

A novel single-switch power module has been developed, featuring a laminated blade connector for low inductance interconnect to a busbar. The module was designed, optimized and experimentally validated as part of a high frequency three-phase converter, demonstrating parasitic inductances of less than one nano henry for the module and as low as five nano henries for the converter phase-leg commutation loop. The flexible plug-in hardware facilitated direct comparison of switching performance between three different chipsets, including a 150A and a 300A hybrid designs using the fastest 1200V silicon IGBTs with silicon carbide (SiC) Schottky diodes, as well as a 150A all-SiC module with emerging SiC MOSFETs. The results were also compared with switching performance of standard modules. First, the impact of parasitic inductance on switching performance was quantified by testing the same 300A hybrid chipset in an industry-standard module. Compared to the low inductance blade POL module, the standard module had 65% higher voltage overshoot and 30% higher total switching losses. Second, the switching performance of the 150A, 1200V fast IGBT, in either standard silicon or the hybrid blade module, was compared with the all-SiC blade module under the same test conditions. The IGBT switching losses of the standard silicon module were 3.5 times higher, while the hybrid blade module losses were 2.5 times higher than those of the all-SiC module. The new low inductance blade module is an excellent package for the new generation of fast silicon IGBTs and the emerging SiC power devices. The module will enable efficient power conversion at significantly higher switching frequencies and power densities.

No abstract

One of the key challenges in the thermal management of electronic packages are interfaces, such as those between the chip and heat spreader and the interface between a heat spreader and heat sink or cold plate. Typically, thermal interfaces are filled with materials such as thermal adhesives and greases. Interface materials reduce the contact resistance between the mating heat generating and heat sinking units by filling voids and grooves created by the nonsmooth surface topography of the mating surfaces, thus improving surface contact and the conduction of heat across the interface. However, micron and submicron voids and delaminations still exist at the interface between the interface material and the surfaces of the heat spreader and semiconductor device. In addition, a thermal interface material (TIM) may form a filler-depleted and resin-rich region at the interfaces. These defects, though at a small length scale, can significantly deteriorate the heat dissipation ability of a system consisting of a TIM between a heat generating surface and a heat dissipating surface. The characterization of a freestanding sample of TIM does not provide a complete understanding of its heat transfer, mechanical, and interfacial behavior. However, system-level characterization of a TIM system, which includes its freestanding behavior and its interfacial behavior, provides a more accurate understanding. While, measurement of system-level thermal resistance provides an accurate representation of the system performance of a TIM, it does not provide information regarding the physical behavior of the TIM at the interfaces. This knowledge is valuable in engineering interface materials and in developing assembly process parameters for enhanced system-level thermal performance. Characterization of an interface material between a silicon device and a metal heat spreader can be accomplished via several techniques. In this research, high-magnification radiography with computed tomography, acoustic microscopy, and scanning electron microscopy were used to characterize various TIM systems. The results of these characterization studies are presented in this paper. System-level thermal performance results are compared to physical characterization results.

A novel integral micro-channel heat sink was developed, featuring an array of sub-millimeter channels fabricated directly in the back-metallization layer of the direct bond copper or active metal braze ceramic substrate, thus minimizing the material between the semiconductor junction and fluid and the overall junction-to-fluid thermal resistance. The ceramic substrate is bonded to a baseplate that includes a set of interleaved inlet and outlet manifolds for uniform fluid distribution across the actively cooled area of the heat sink. The interleaved manifolds greatly reduce the pressure drop and minimize temperature gradient across the heat sink surface. After performing detailed simulations and design optimization, a 200 A, 1200 V IGBT power module with the integral heat sink was fabricated and tested. The junction-to-fluid thermal resistivities for the IGBTs and diodes were 0.17°C*cm 2 /W and 0.14°C*cm 2 /W, respectively. The design is superior to all reported liquid cooled heat sinks with a comparable material system, including the micro-channel designs. It is also easily scaleable to larger heat sink surfaces without compromising the performance.