No abstract

The impact of aerobic exercise training (AET) on cerebral blood flow (CBF) regulation remains inconclusive. This study investigated the effects of one-year progressive, moderate-to-vigorous AET on CBF, central arterial stiffness, and cognitive performance in cognitively normal older adults. Seventy-three older adults were randomly assigned to AET or stretching-and-toning (SAT, active control) intervention. CBF was measured with 2D duplex ultrasonography. Central arterial stiffness, measured by carotid β-stiffness index, was assessed with the ultrasonography and applanation tonometry. Cerebrovascular resistance (CVR) was calculated as mean arterial pressure divided by CBF. A cognitive battery was administered with a focus on memory and executive function. Cardiorespiratory fitness was measured by peak oxygen consumption ([Formula: see text]O2peak). One-year AET increased [Formula: see text]O2peak and CBF and decreased CVR and carotid β-stiffness index. In the AET group, improved [Formula: see text]O2peak was correlated with increased CBF (r = 0.621, p = 0.001) and decreased CVR (r = −0.412, p = 0.037) and carotid β-stiffness index (r = −0.478, p = 0.011). Further, increased Woodcock-Johnson recall score was associated with decreased CVR (r = −0.483, p = 0.012) and carotid β-stiffness index (r = −0.498, p = 0.008) in AET group (not in SAT group). In conclusion, one-year progressive, moderate-to-vigorous aerobic exercise training increased CBF and decreased carotid arterial stiffness and CVR which were associated with improved memory function in cognitively normal older adults.

The accuracy issues in the location prediction system using active RFID tags is addressed in this paper. First we present the location prediction accuracy in different environmental conditions. Later on, we propose a new technique to improve the prediction accuracy. The proposed technique is validated with measured data obtained under different propagation environments.

The multi-core architecture has revolutionized the parallel computing. Despite this, the modern age compilers have a long way to achieve auto-parallelization. Through this paper, we introduce a language that encouraging the auto-parallelization. We are also introducing Front-End for our auto-parallelizing compiler. Later, we examined our compiler employing a different number of core and verify results based on different metrics based on total compilation time, memory utilization, power utilization and CPU utilization. At last, we learned that parallelizing multiple files engage more CPU resources, memory and energy, but it finishes the task at hand in less time. In this paper, we have proposed a loop code generation technique that makes the generation of nested loop IR code faster by dividing the blocks into some extra code blocks using a modular approach. Our TAM compiler technique speedup by 7.506, 5.283 and 2.509 against sequential compilation when we utilized 8, 4 and 2 cores respectively. We observed that the CPU utilization of the TAM compiler reaches the maximum permissible limit when an optimal parallelizable instance is compiled.