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In semiconductor fabrication, there are various methods that can be employed to form fine structures. Such techniques include a combination of advance lithography and etching, chemical mechanical planarization (CMP), or metal lift-off. However, these techniques may not be the easiest or the most cost effective. When using lithographic methods such as ultraviolet (UV), deep ultraviolet (DUV), extended ultraviolet (EUV), E-Beam [1], and X-ray, there are always resolution and alignment issues such as how small a structure can be produced and how closely and accurately a structure can be aligned to another. Even when lithography issues are resolved, patterning of very fine structures is also a problem. Wet chemical etching is not feasible when trying to produce submicrometer features because of large undercuts due to the isotropic nature of the etch solution. Lift-off with sacrificial resist [2] is a more common solution to produce nanostructures, but the technique does have resist imposed limitations where deposition must take place below 200°C because of resist thermal stability preventing its use with chemical vapour deposition processes. Also, organizing nanostructures into highly ordered array can also prove extremely challenging.In this paper, the authors demonstrate a method to produce nanostructures and nanowires with dimensions down to 10nm by a self-alignment process using the standard CMOS spacer technology [3]. In this process, very accurate alignment is achieved because the alignment is not determined by the lithographic tool but by the structures and materials themselves. The spacer technique is commonly used in the fabrication of nanometer transistor and does not require the use of submicron lithographic tools. As illustrated in Figure 1, arrays of polysilicon nanostructures have been fabricated on 8" silicon wafers. These include ultra fine structures down to 20nm with an aspect ratio of 10:1 (Fig. 1b), and 10nm structures with an aspect ratio of 20:1 (Fig 1c). In this process, very accurate alignment is achieved. The formed polysilicon nanostructures can be used as an etch mask to transfer fine patterns to insulating materials such as silicon nitride (Si 3 N 4 ) which in turns is used as a mask for bulk machining of deep silicon structures as shown in Figure 2. The fabricated polysilicon nanowires were phosphorous doped to characterize the effect of length (Fig. 3) and diameter (Fig. 4) on the wire resistance. The resistance of the nanowires was found to increase linearly when varying the wire length from 20 to 500nm where the diameter of the nanowires has a significant impact to the wire resistance when its diameter is less than 50nm.The self-aligned polysilicon nanostructures described in this paper has potential applications in nano-electromechanical devices (NEMS), such as pressure sensors, resistive heaters and capacitive or ohmic beam switches. References[1] G. Rius, J. Liobet, J. Arcamone, X. Borrisé and F. Pérez-Murano, "Electron-and ion-beam lithography for the fabrication of nanomechanical ...