No abstract

Abu Dhabi's mature field with more than 50 years of production history and over 350 wells that is presented in this paper is one of the world's largest offshore oil fields. As oil fields mature, water and gas breakthroughs become increasingly frequent and the understanding of fluid movement becomes crucial for proper reservoir management, efficient remedial works and optimum workovers and future wells drilling, which all expected to enhance oil recovery. This paper introduces an innovative logging technique designed to track fluid movement deep in the formation in flow and no-flow intervals and through casing.

In this paper, we propose a low noise CMOS frontend for a Point-of-Care (PoC) biosensing platform based on tunnel magnetoresistance (TMR) as sensors. The integration of a low noise and low power integrated circuit (IC) with the TMR sensors reduces power consumption compared to a realization with discrete electronics and, thereby, paves the way towards a portable diagnostic system. The proposed chip uses a DCcoupled fully differential difference amplifier (FDDA) to amplify the minute signals generated by magnetic nanotags (MNTs) that will be used as biomarkers in the target biosensing application. The FDDA features a gain of around 60 dB with a suitable offset calibration scheme to deal with the large DC offsets caused by TMR and/or magnetic field mismatch. The ability to deal with varying DC fields is crucial for a portable setup that is intended to be used in unshielded environments outside the lab. The offset cancellation is achieved by two on-chip current steering DACs that can accommodate TMR resistances between 535 ⌦ and 4.7 k⌦. The presented chip is manufactured in a 180 nm SOI CMOS technology and features a thermal noise floor of 7 nV/ p Hz. It consumes a total of 7.7 mA from a 1.8 V supply.

We present a tunneling magnetoresistive (TMR) sensing microsystem consisting of a low flicker noise TMR sensor and a custom integrated readout frontend. The proposed sensor readout circuit introduces a novel ultra-low-noise current biasing scheme for the TMR sensor, which achieves a very low current noise floor of 2.2 pA/ √ Hz for a 1 mA biasing current. The TMR output voltage is processed by a differential readout scheme to improve the baseline-to-signal ratio. The microsystem also features an on-chip 10-bit current DAC that allows compensating for the large process variations in the TMR base resistance value. The readout chip is manufactured in a 180 nm SOI CMOS technology and heterogeneously integrated with the TMR sensor. The readout chain provides a thermal noise floor of 4 nV/ √ Hz, while, together with the biasing scheme, consuming a total power of 38 mW. The complete sensor system consisting of the TMR and the readout circuit provides a state-of-the-art magnetic field noise floor of 120 pT/ √ Hz.