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The telecommunications industry has developed new system architectures through the PCI Industrial Computer Manufacturers Group (PICMG) organization. These are the Advanced Telecom Computing Architecture (ATCA) platforms that consist of the ATCA, ATCA300, Advanced Mezzanine Card (AMC), and MicroTCA specifications. Unfortunately, only the AMC and MicroTCA specification directly addresses testability using an IEEE Std 1149.1 (JTAG) compatible interface. This paper will address the system test facility specified in the MicroTCA specification for testing the incorporated AMC modules as well as the MicroTCA Carrier Hub (MCH) controllers. Access to the individual AMC JTAG chains is provided using a JTAG Switch Module that provides a programmable star architecture in the system.

We present an embedded boundary-scan test vector management solution that ensures the correct version of test vectors is applied to the Unit Under Test (UUT). This new vector management approach leverages the system-level boundary-scan multi-drop architecture employed in some high availability electronic systems. Compared to previous methods that do not use system-level boundary-scan resources for vector management, this new approach ensures that the correct boundary-scan vectors are retrieved from the UUT without affecting its operation and requires minimal UUT functionality to execute. The performance and effectiveness of this technique is shown using an actual design example that has been realized in a new product.

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