In this paper we present a scalable dataflow hardware architecture optimized for the computation of generalpurpose vision algorithms-neuFlow-and a dataflow compiler-luaFlow-that transforms high-level flow-graph representations of these algorithms into machine code for neuFlow. This system was designed with the goal of providing real-time detection, categorization and localization of objects in complex scenes, while consuming 10 Watts when implemented on a Xilinx Virtex 6 FPGA platform, or about ten times less than a laptop computer, and producing speedups of up to 100 times in real-world applications. We present an application of the system on street scene analysis, segmenting 20 categories on 500 × 375 frames at 12 frames per second on our custom hardware neuFlow.

The Parallel Fortran Preprocessor ( P F P ) is a programming model for Multiple Instruction Multiple Data (MIMD) parallel computers. It provides a simple paradigm consisting of data storage modifiers and parallel execution control statements. The model is lightweight and scalable in nature. The control constructs impose no implicit synchronizations, nor do they require off-processor m e m o r y references.The model is portable. It is implemented as a source to source translator which requires very little support from the back end compiler. The implementation has an option t o produce serial code which can then be compiled for serial execution.