This paper briefly introduces the principles of linear 3-pole wiring method to form current circuit through soil to measure grounding resistance; discusses the feasibility of linear 3-pole wiring method to measure the grounding resistance of buildings (structures) in water; adopts comparative method to carry out field measurement on the grounding resistance of representative grounding devices in water and the grounding resistance of grounding devices in the soil adjacent to water; discusses the applicability and validity of linear 3-pole wiring method to measure the grounding resistance of buildings (structure) in water through variance analysis and correlation coefficient analysis methods, and solves the problem about how to measure the grounding resistance of buildings (structures) in water.

This article describes a dual-controller dual-delay line delay lock loop (DC-DL DLL). The proposed DLL adopted a dual delay line structure, each delay line was composed of a coarse adjustment and a fine adjustment unit, and the dual delay lines had corresponding control units to reduce the mismatch between the delay lines, and it avoided the complicated design of duty cycle correction (DCC) circuit. A frequency divider was added to divide the input clock to achieve a wider input clock duty cycle adjustment. Additionally, a simple clock synthesis circuit was proposed to synthesize the required clock. The DLL design used the 25 nm process with a voltage of 1.2 V. The simulation results showed that at a working frequency of 1.6 GHz, the peak-to-peak jitter of the DC-DL DLL after locking was approximately 17.61 ps, the maximum output duty cycle error was about 1.3%, and the input duty cycle ranged from 20% to 80%, with a power consumption of 10.06 mW.