With a large number of multi‐input multi‐output (MIMO) antennas embedded in the smartphone, much higher data throughput can be obtained for the smartphone in the MIMO operation. Furthermore, in order to be operational in heterogeneous networks, such as the mobile network and the wireless wide area network (WLAN), dual‐band operation of the MIMO antennas is desirable. However, owing to very limited space available in the smartphone, it has been a great challenge to dispose more MIMO antennas therein, not to mention the dual‐band MIMO antennas. To address this challenge, we present a compact decoupled 3.5/5.8 GHz (3400–3600/5725–5875 MHz) dual‐band building block formed by dual inverted‐F/loop antennas and its application for building eight dual‐band MIMO antennas for the mobile and WLAN operations. Details of the dual‐band building block and the fabricated eight MIMO antennas are described. The channel capacity of the eight MIMO antennas in an 8 × 8 MIMO system is also calculated and discussed. The obtained MIMO channel capacities are respectively about 37 and 42 bps/Hz in the 3.5 and 5.8 GHz bands, much higher than the present fourth‐generation (4G) 2 × 2 MIMO capacity (about 10 bps/Hz or less). The proposed eight MIMO antennas will hence be promising for future smartphone applications, such as in the fifth‐generation (5G) communications.

Two coupled‐fed loop antennas with a conjoined capacitor‐embedded section to achieve compact size and high isolation for the fifth‐generation (5G) multi‐input multi‐output (MIMO) operation in the tablet device are presented. The two conjoined loop MIMO antennas cover the 5G band of 3300‐4200 MHz, which is considered to be the largest contiguous frequency range potentially available for 5G mobile broadband services below 6000 MHz. The conjoined capacitor‐embedded section not only functions as a part of the resonant path of the two loop antennas but also behaves like a band‐pass resonant structure in the operating band. The latter makes the capacitor‐embedded section to have much lower impedance in the operating band, as compared to that of a simple strip section. This makes it capable of effectively attracting the surface currents on the ground plane excited by one loop antenna to be away from the feed port of the other loop antenna. The two loop antennas can hence exhibit high isolation, even though the two antennas are conjoined to have a simple integrated planar structure of compact size. The envelope correlation coefficient (ECC) of the two conjoined loop antennas is also very small, less than 0.1 in the operating band.

A stepper motor is usually operated in position open-loop control for simplicity. However, in order to improve the transient and steady-state performances of the stepper motor-based drive system, a high performance stepper motor drive system is usually designed to feed the encoder signal back to form a closed-loop system such as a general servo motor drive, and high-performance position and speed loop controller can then be used to overcome the nonlinear characteristics of the motor, such as the cogging force and impacts from external load. On the other hand, the existed cogging force of the hybrid stepper motor must be solved to increase the positioning precision. The variable structure control (VSC) is insensitive to the bounded uncertainty and load disturbance, and has been known as a high-performance controller. A predefined sliding surface is used to shape the system performances, and incorporate with switching control to achieve the robustness property. Thus, we applied the VSC to implement the stepper motor drive system about the position and speed control, and the switching control is used to overcome the cogging force. The field programmable gate array (FPGA) is a good alternative to be used to realize a motor drive system by considering its programmable ability and diverse designing environment. It is easily developed as an intellectual property (IP) for future use or combined as a part of a large control system. This paper showed the procedures to develop the hardware circuits for the variable structure controller, and applied it to stepper motor position and velocity control. Functions such as PI controllers, dq-axis transformation and two-phase space vector space vector modulation (SVPWM) designed for the stepper motor drives are also shown in the paper. The system simulation and hardware circuit realization are based on MATLAB/Simulink, and realized on Altera FPGA. Simulations on MATLAB/Simulink with trapezoidal velocity profile command, and experiments with and without the load added are shown to demonstrate the hardware performances and correctness.

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