The design of a scalable optical local area network formultiprocessing systems is described. Each workstation has aparallel-fiber-ribbon optical link to a centralized complementarymetal-oxide silicon (CMOS) switch core, implemented on a singlecompact printed circuit board (PCB). When the Motorola Optobusfiber technology is used, each workstation has a data bandwidth of 6.4Gbits/s to the core. A centralized switch core interconnecting 32workstations supports a 204-Gbit/s aggregate data bandwidth. Theswitch core is based on a conventional broadcast-and-selectarchitecture, implemented with parallel CMOS integrated circuits(IC's). The switch core scales well; by incorporation of theCMOS optoelectronic IC's with optical input-output, the electricalcore can be reduced to a single-chip optoelectronic IC with terabitcapacities. A prototype of an optoelectronic switch core has been fabricated and is described. The appeal of the architectureincludes its reliance on commercially available parallel-fibertechnology, its reliance on the well-developed markets of local areanetworks and networks of workstations, and its smooth scalability from the electrical to optical domains as technology matures.

A field-programmable logic device (FPLD) with optical I/O is described. FPLD's with optical I/O can have their functionality specified in the field by means of downloading a control-bit stream and can be used in a wide range of applications, such as optical signal processing, optical image processing, and optical interconnects. Our device implements six state-of-the-art dynamically programmable logic arrays (PLA's) on a 2 mm x 2 mm die. The devices were fabricated through the Lucent Technologies-Advanced Research Projects Agency-Consortium for Optical and Optoelectronic Technologies in Computing (Lucent/ARPA/COOP) workshop by use of 0.5-microm complementary metal-oxide semiconductor-self-electro-optic device technology and were delivered in 1998. All devices are fully functional: The electronic data paths have been verified at 200 MHz, and optical tests are pending. The device has been programmed to implement a two-stage optical switching network with six 4 x 4 crossbar switches, which can realize more than 190 x 10(6) unique programmable input-output permutations. The same device scaled to a 2 cm x 2 cm substrate could support as many as 4000 optical I/O and 1 Tbit/s of optical I/O bandwidth and offer fully programmable digital functionality with approximately 110,000 programmable logic gates. The proposed optoelectronic FPLD is also ideally suited to realizing dense, statically reconfigurable crossbar switches. We describe an attractive application area for such devices: a rearrangeable three-stage optical switch for a wide-area-network backbone, switching 1000 traffic streams at the OC-48 data rate and supporting several terabits of traffic.

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The design of a fiber-optic local area network (LAN) demonstration system is described. A complete LAN system would consist of an array of 16 personal computers (PC's), where each PC has a network interface card (NIC) with a parallel fiber-optic datalink to a centralized optoelectronic switch core. The centralized core switches the data generated by 16 NIC's, up to 128 Gbit/s of bandwidth. The demonstrator is designed to scale to terabits of bandwidth by use of an emerging optoelectronic technology, i.e., integrated complementary metal-oxide semiconductor (CMOS) substrates with vertical-cavity surface-emitting laser (VCSEL) and photodetector optical input and output. A subset of the complete system was constructed and is operational. A prototype NIC card, with Motorola Optobus VCSEL transceivers for the optical datalinks, was constructed and is described. A prototype high-speed bipolar switch core, with statically configurable electrical positive-emitter coupled-logic 16 x 16 crossbar switches, CMOS field-programmable gate arrays, and Motorola Optobus transceivers, was constructed and is described. We successfully demonstrated the transmission of high-speed packetized data from one NIC card, through 10 m of parallel fiber ribbon and the centralized switch core, and back to the NIC. We summarize our experiences on the design and testing of our first demonstration system and our development toward a terabit switch core.

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