No abstract

In view of the problem that the traditional motor test system cannot directly test the transient parameters of the motor and the dynamic arbitrary load loading requirements during motor loading, as well as the high cost of implementation, this research uses STM32+FPGA as the core to form the main control of the motor test system unit, combining the superior control performance of the ARM processor and the high-speed data processing advantages of FPGA. FPGA and STM32 are controlled by the FSMC bus communication and data ping-pong algorithm. Using this method, a small-size control core board in the motor test system is manufactured. It can be embedded in the existing traditional dynamometer system to improve the dynamometer transient parameter test and the dynamic motor loading performance. The experimental results show that the system can basically meet the requirements of the motor transient test and dynamic loading, and can achieve the fastest data refresh rate of 1 ms when measuring the motor’s speed and torque, as well as arbitrary waveform loading within a 100 M sampling frequency, with a loading error of 0.8%. It satisfies the motor transient test and dynamic loading requirements.