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The peak power consumption of hardware components affects their power supply, packaging, and cooling requirements. When the peak power consumption is high, the hardware components or the systems that use them can become expensive and bulky. Given that components and systems rarely (if ever) actually require peak power, it is highly desirable to limit power consumption to a lessthan-peak power budget, based on which power supply, packaging, and cooling infrastructures can be more intelligently provisioned.In this paper, we study dynamic approaches for limiting the power consumption of main memories. Specifically, we propose four techniques that limit consumption by adjusting the power states of the memory devices, as a function of the load on the memory subsystem. Our simulations of applications from three benchmarks demonstrate that our techniques can consistently limit power to a pre-established budget. Two of the techniques can limit power with very low performance degradation. Our results also show that, when using these superior techniques, limiting power is at least as effective an energy-conservation approach as state-of-the-art techniques explicitly designed for performance-aware energy conservation. These latter results represent a departure from current energy management research and practice.

This study consists in the evaluation of the use of an artificial neural network of modular architecture in building probabilistic constant life diagrams. Therefore, an algorithm developed in previous studies which was applied to achieve deterministic values has proved itself viable when at least three S-N curves were used. For this case, the probability S-N curves were used for training and validation of the modular network based on the generalized power law and a probability of 5% for failure has been considered. In addition, three composite materials were evaluated with a considerable number of tests to better assess the model.

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