This paper proposes a reconfigurable sensor analog front-end using low-noise chopper-stabilized delta-sigma capacitance-to-digital converter (CDC) for capacitive microsensors. The proposed reconfigurable sensor analog front-end can drive both capacitive microsensors and voltage signals by direct conversion without a front-end amplifier. The reconfigurable scheme of the front-end can be implemented in various multi-mode applications, where it is equipped with a fully integrated temperature sensor. A chopper stabilization technique is implemented here to achieve a low-noise characteristic by reducing unexpected low-frequency noises such as offsets and flicker noise. The prototype chip of the proposed sensor analog front-end is fabricated by a standard 0.18-μm 1-poly-6-metal (1P6M) complementary metal-oxide-semiconductor (CMOS) process. It occupies a total active area of 5.37 mm2 and achieves an effective resolution of 16.3-bit. The total power consumption is 0.843 mW with a 1.8 V power supply.

This paper presents a first-order delta-sigma (ΔΣ) capacitance-to-digital converter (CDC) with low noise characteristics and a reconfigurable resolution of 12 to 16 bits. The proposed ΔΣ CDC is implemented as a first-order ΔΣ modulator with switched capacitor (SC) integrator and comparator. The resolution can be reconfigured by the accumulator using the reconfigurable 12-to 16-bit up-counter. ΔΣ schemes are widely used for low-noise applications owing to the ability of the ΔΣ modulator to reduce in-band white noise through its inherent noise-shaping characteristic. Low-frequency colored noises such as flicker (1/f ) noises still remain. In order to reduce the low-frequency colored noise component, a chopper stabilization technique is exploited using the SC integrator of the ΔΣ CDC. The proposed ΔΣ CDC also controls the offset calibration capacitors that adjust the DC offset. This is caused by a capacitor mismatch owing to process variation and the parasitic capacitance of the input capacitive sensor. The ΔΣ CDC is fabricated by using the standard 0.18 μm 1P6M complementary metal-oxidesemiconductor (CMOS) process with an active area of 0.66 mm 2 . The total current consumption for the 16-bit ΔΣ CDC is 141 μA with a 1.8 V supply.

In this paper, a low-noise 16-bit capacitance-to-digital convertor (CDC) for a capacitive humidity sensor is proposed. The proposed sensor interface circuit is implemented as a firstorder incremental delta-sigma structure and directly converts the capacitance change of the humidity sensor to a 16-bit digital code. A switched capacitor (SC) integrator of the deltasigma modulator is adopted in the chopper stabilization technique for a low-noise characteristic. The chopper stabilization technique can avoid the offset and low-frequency flicker noise of an amplifier. The offset cancellation programmable capacitor array of the input stage is used for eliminating the mismatched capacitance from the parasitic capacitor and process variations. The proposed delta-sigma CDC has an accumulator with a simple 16-bit dual counter that converts the delta-sigma modulator output to a 16-bit digital code for reducing the power consumption of the back-end digital processing. The proposed sensor interface circuit is fabricated using the standard 0.18 μm complementary metal-oxide-semiconductor process with an active area of 0.66 mm 2. The effective resolution of the worst case is 14.4 bits, and the active power consumption of the proposed delta-sigma CDC is 376 μW with a 1.8 V supply.

No abstract

No abstract