Details of a new low power FFT processor for use in digital television applications are presented. This has been fabricated using a 0.6 p m CMOS technology and can pelform a 64 point complex forward or inverse FFTon real-time video at up to 18 Megasamples per second. It comprises 0.5 million transistors in a die area of 7 . 8~8 mmz and dissipaires 1 W. Its pelformnce, in t e " of computational rate per area per watt, is significantly higher than previously reported devices, leading to a cost-effective silicon solution for high quality video processing applications. This is the result of using a novel VLSI architecture which has been derived from a first principles factorisation of the DFT matrix and tailored to a direct silicon implementation.

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