A fabrication method of 2-D nanostructure materials applied for forming nanothick SOI materials without using post-thinning processes is presented in this paper. The thickness of SOI layer is precisely controlled by a polysilicon layer as a sacrificial layer in the implantation step to acquire a desirable implant depth. Polysilicon layer was initially deposited on the thermal oxidized surface of silicon wafer prior to the ion implantation step with 4×10 16 /cm -2 , 160KeV, H 2 + ions. The as-implanted wafer was contained a hydrogen-rich buried layer which depth from the top surface is less than 100 nm. Before this as-implanted wafer being bonded with a handle wafer, the polysilicon layer was removed by a wet etching method. A nanothick silicon layer was then successfully transferred onto a handle wafer under 10-minute microwave irradiation after the bonding step. The thickness of the final transferred silicon layer was 100 nm measured by transmission electron microscopy (TEM).

Abstract2,3‐Dimethylpentacene (DMP) and 2,3‐dimethyltetracene (DMT) were synthesized, characterized and employed as the channel material in the fabrication of thin‐film transistors. The two methyl groups increase the chemical stability of the compounds versus the pristine acene analogues. The crystals maintain herringbone‐like molecular packing, whereas the weak dipole associated with the unsymmetrical molecule induces an anti‐parallel alignment among the neighbors. This structural motif favors layered film growth on SiO2/Si surface. Thin film transistors prepared on SiO2/Si and n‐nonyltrichlorosilane‐modified SiO2/Si at different substrate temperatures were compared. DMP‐based transistors prepared on rubbed n‐nonyltrichlorosilane‐modified SiO2/Si substrate gave the highest field‐effect mobility of 0.46 cm2/Vs, whereas DMT‐based transistor gave a mobility of 0.028 cm2/Vs.