Investigation of the recombination and trapping processes of photoinjected carriers in semi-insulating Cr-doped GaAs (ρ ∼ 108 Ω cm) has been made at 80 and 300°K, using the photomagnetoelectric (PME) and photoconductive (PC) effects under large-injection conditions. A generalized theory for the PME and PC effects is developed, taking into account the variation of carrier lifetimes with injected-carrier density (i.e., τn = κΔnβ) and of the trapping of holes in the Cr levels (i.e., Δp = ΓΔn, Γ<1), by using a simple recombination and trapping model. The result yields a power-law relationship between the PME short-circuit current and the photoconductance, in a form that IPME varies as ΔG2/(2+β), valid for different injection ranges. Two well-defined ranges of injection were observed from the present results: In region I (high injection), IPME is directly proportional to ΔG (i.e., β = 0), and in region II (intermediate injection), IPME varies with ΔG1.2 (i.e., β = −⅓). Numerical values of τn, τp, and IPME as functions of ΔG are given. The results are in good agreement with the theoretical predictions.
The specific contact resistance of A u / G e / N i alloy contacts to G a A s for transferred electron devices has been measured. It is found that a shallow sulfur diffusion under the contact is effective in reducing the specific contact resistance by up to two orders of magnitude. This procedure is expected to improve the uniformity of threshold and bias voltages in integrated circuit configurations by making the contact resistance only 1-10% of the total device resistance.Because of the low doping found in GaAs transferred electron devices (TED's) for microwave applications, the contact resistance to the device is the major part of the total device resistance. A survey of the literature indicates that for a given doping level, the contact resistance can vary uP to two orders of magnitude as the processing parameters are varied (1-5). Significant variation can also occur across a wafer in a given run. This situation is allowable for discrete device configurations where postsorting is possible. In integrated circuit configurations, however, local variations are intolerable because threshold and bias voltages must be uniform from one device to the next in the same circuit. The purpose of this paper is to show that a shallow sulfur diffusion u n d e r the metallization pads can reduce the contact resistance to 1-10% of the total device resistance. The specific contact resistance is lowered by approximately two orders of magnitude over that measured on nondiffused samples.The metallurgical and electrical properties of alloyed A u -G e / N i films on n -t y p e GaAs are relatively well understood (1). Edwards, Hartman, and Torrens (2) have summarized specific contact resistance data of this and other contact alloys to GaAs through mid-1971. In general, their data show two order of magnitude variation in the specific contact resistance which ranges from a m e a n of 3 • 10 -3 ~-c m at a doping level of mid-1015/cm 8 to 10 -4 ~-c m at 1017/cm ~. Robinson (3) and Yu (4) have independently confirmed that by process optimization, the mean specific contact resistance can be lowered by up to one order of magnitude. For GaAs TED's doped from mid-1015/cm ~ to mid-1016/cm 3, the specific contact resistance values reported as well as those measured in our laboratories give a device contact resistance far greater than the intrinsic device resistance (typically 3000~). To lower the contact resistance to 1-10% of the total device resistance, a specific contact resistance of ~10 -5 ~-c m is required. The exact value depends on the specific device configuration. This value is two orders of magnitude lower than that reported, and hence can only be achieved by the formation of a shallow n-t-layer below the contact to give a doping level of mid-1017/cm 3 to mid-101S/cm ~.The samples used in this experiment were semiinsulating GaAs substrates on which 25 #m vapor phase epitaxy layers were grown. The typical doping range was mid-1015/cm 8 to mid-1016/cm 3 n -t y p e (Si). Ohmic contacts were formed by evaporation of a gold/ 12 weight perc...
It was found that the residual clamping force of bipolar electrostatic chucks created by the residual charge between a wafer and an electrode would not only cause a wafer sticking problem but also degrade dynamic random access memory (DRAM) data retention performance. The residual clamping force and data retention fail bit count (FBC) of DRAM showed strong correlations to the gate tungsten etch dechucking process condition. Wafer sticking only degraded DRAM cell retention performance, and did not influence any in-line measurement or electrical parameters. Electrical characterization analysis of the FBC proved that the retention loss was mainly due to junction leakage rather than gate-induced-drain-leakage current. A new approach was proposed to suppress this leakage by introducing N2 gas instead of O2 to supply more plasma charges for neutralizing the wafer surface residual charges. The wafer shift dynamic alignment (DA) offset and retention FBC could be reduced by 50 and 40%, respectively. Poor data retention was suspected because of the compressive stress caused by wafer sticking DA shift resulting in a high electric field at the junction and an increase in junction leakage at the storage node.
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