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An enhanced leakage current through thin SiO2 gate insulators following ion implantation of source/drain regions in self-aligned gate complementary-metal-oxide semiconductors has been examined. The enhanced leakage current degrades insulator properties and is localized at the perimeter of the gate feature. A model of ion mixing between the gate material, oxide layer, and underlying silicon at the gate-feature edge has been used to explain the degradation. The atomic weight of the implant species is critical, with heavier species like arsenic demonstrating a severe degree of degradation. Implantation of lighter species like boron results in minimal degradation at normal dose levels. The gate-electrode material is also important. Electrodes formed with the highest-atomic-weight and density materials demonstrate the most degradation. Gate charging during the ion-implantation process does not significantly impact the degree to which samples are degraded at the implant currents used in this work.

A wide variety of materials and processes for high k dielectrics and metal gate electrodes have been studied as replacements for poly-Si/SiO2 or SiON in advanced CMOS devices. Care must be taken with the interfacial layer to control not only the nitrogen content but its spatial location. Nanocrystallization of the high k dielectric and the corresponding formation of charge and trapping levels associated with defects in the dielectric present one of the current challenges. Control of the workfunction of the gate electrode is shown to depend on many variables, including oxygen content and the material used for the capping layer on the metal gate. The hafnium oxide family of materials, along with metal alloy gates, is seen to provide the best solution for equivalent oxide thicknesses (EOT's) < 0.7 nm, but higher k dielectrics and thinner interfacial layers are needed below 0.7 nm.

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