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MPEG-4 is the most recent coding standard for multimedia applications.It introduces script-based compositing of audiovisual scenes from multiple audio and visual objects. The TANGRAM VLSI co-processor is intended to assist existing MPEG-4 video-decoders to perform the computation intensive last stage in the decoding process, which is specific to MPEG-4: rendering and final composition of scenes at the display. TANGRAM consists of a RISC control processor and multiple powerful arithmetic units that perform rendering calculations directly in hardware. Communication to a host CPU and video decoding hardware is done via the very common PI-bus on-chip interface. TANGRAM directly interfaces with the ITU-R6011656 digital video output. VHDL implementation and synthesis for a 0 . 3 5~ standard-cell library provide an estimate of 100 MHz achievable clock-frequency (worst-case), 52 mm* overall area and 1 Watt power dissipation. The presented TANGRAM co-processor has sufficient performance for rendering of MPEG-4 Main Profile@Layer3 scenes (CCIR).