No abstract

No abstract

No abstract

The fabrication of ultrathin compressively strained SiGe-On-Insulator layers by the condensation technique is likely a key milestone towards low-power and high performances FD-SOI logic devices. However, the SiGe condensation technique still requires challenges to be solved for an optimized use in an industrial environment. SiGe oxidation kinetics, upon which the condensation technique is founded, has still not reached a consensus in spite of various studies which gave insights into the matter. This paper aims to bridge the gaps between these studies by covering various oxidation processes relevant to today's technological needs with a new and quantitative analysis methodology. We thus address oxidation kinetics of SiGe with three Ge concentrations (0%, 10%, and 30%) by means of dry rapid thermal oxidation, in-situ steam generation oxidation, and dry furnace oxidation. Oxide thicknesses in the 50 Å to 150 Å range grown with oxidation temperatures between 850 and 1100 °C were targeted. The present work shows first that for all investigated processes, oxidation follows a parabolic regime even for thin oxides, which indicates a diffusion-limited oxidation regime. We also observe that, for all investigated processes, the SiGe oxidation rate is systematically higher than that of Si. The amplitude of the variation of oxidation kinetics of SiGe with respect to Si is found to be strongly dependent on the process type. Second, a new quantitative analysis methodology of oxidation kinetics is introduced. This methodology allows us to highlight the dependence of oxidation kinetics on the Ge concentration at the oxidation interface, which is modulated by the pile-up mechanism. Our results show that the oxidation rate increases with the Ge concentration at the oxidation interface.

Ge condensation using RTO is investigated to produce good quality SGOI channel. This study shows the significant role of the RTO temperature in Ge condensation. First, Ge diffusion requires a RTO temperature above 950°C to start homogenization of Ge in the channel. This is mandatory to minimize the risk of defects generation. Then, inconsistently to thermodynamics calculation, Ge-O bounds are formed during oxidation and a higher temperature oxidation leads to a lower Ge-O bounds formation. Therefore, Ge condensation using a 1100°C RTO is preferred. It is implemented in a SOI/SGOI co-integration to produce SGOI channel for PMOS transistor. Such channel exhibits a very smooth surface (RMS roughness below 0.15nm), a controlled Ge content (16%) and a high compressive strain (1%). Moreover, PMOS Vt modulation by the Ge concentration was performed with a sensitivity of 10mV/%. As a result, this study demonstrates that RTO is a solid alternative to furnace for Ge condensation.