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This paper addresses the modeling of differential drivers and receivers for the analog simulation of high-speed interconnection systems. The proposed models are based on mathematical expressions, whose parameters can be estimated from the transient responses of the modeled devices. The advantages of this macromodeling approach are: improved accuracy with respect to models based on simplified equivalent circuits of devices; improved numerical efficiency with respect to detailed transistor-level models of devices; hiding of the internal structure of devices; straightforward circuit interpretation; or implementations in analog mixed-signal simulators. The proposed methodology is demonstrated on example devices and is applied to the prediction of transient waveforms and eye diagrams of a typical low-voltage differential signaling (LVDS) data link.

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This paper presents a general strategy for the electrical performance and Signal Integrity assessment of electrically long multi-chip links. A black-box time-domain macromodel is first derived from tabulated frequency responses in scattering form. This model is structured as a combination of ideal delay terms with frequency-dependent rational coefficients. A new identification scheme is presented, based on an initial blind delay estimation process, followed by a refinement loop based on an iterative Delayed Vector Fitting (DVF) process. Two alternative passivity enforcement schemes based on local perturbations are then presented. The result is an accurate and guaranteed passive delay-based macromodel, which is synthesized as a SPICEcompatible netlist for channel analysis. The proposed procedure enables safe and reliable circuit-based transient simulations of complex multi-chip links, including nonlinear drivers and receivers. The performance of the proposed flow is demonstrated on a large number of channel benchmarks.