Abstract-This paper addresses the field of Unbounded Model Checking (UMC) based on SAT engines, where Craig interpolants have recently gained wide acceptance as an automated abstraction technique.We start from the observation that interpolants can be quite effective on large verification instances. As they operate on SAT-generated refutation proofs, interpolants are very good at automatically abstract facts that are not significant for proofs. In this work, we push forward the new idea of generating abstractions without resorting to SAT proofs, and to accept (reject) abstractions whenever they (do not) fulfill given adequacy constraints. We propose an integrated approach smoothly combining the capabilities of interpolation with abstraction and over-approximation techniques, that do not directly derive from SAT refutation proofs.The driving idea of this combination is to incrementally generate, by refinement, an abstract (over-approximate) image, built up from equivalences, implications, ternary and localization abstraction, then (eventually) from SAT refutation proofs.Experimental results, derived from the verification of hard problems, show the robustness of our approach.

Abstract-Constraints represent a key component of stateof-the-art verification tools based on compositional approaches and assume-guarantee reasoning. In recent years, most of the research efforts on verification constraints have focused on defining formats and techniques to encode, or to synthesize, constraints starting from the specification of the design.In this paper, we analyze the impact of constraints on the performance of model checking tools, and we discuss how to effectively exploit them. We also introduce an approach to explicitly derive verification constraints hidden in the design and/or in the property under verification. Such constraints may simply come from true design constraints, embedded within the properties, or may be generated in the general effort to reduce or partition the state space. Experimental results show that, in both cases, we can reap benefits for the overall verification process in several hard-to-solve designs, where we obtain speed-ups of more than one order of magnitude. I. INTRODUCTIONConstraints represent a key component of state-of-the-art simulation and verification tools focusing on compositional verification. In conventional simulation-based frameworks, constraints are very popular to model the environment behavior, often called test-bench. The environment model ensures that only acceptable sequences of values are applied to the design under test. Moreover, the same model can be used to monitor the outputs of the design [1], [2]. In model checking, constraints are used to represent the environment of a block under verification, i.e., the assumptions that the environment must satisfy. Furthermore, constraints are verified as assertions when the design is connected to its real environment. This methodology, usually known as assume-guarantee [3], has gained widespread industrial acceptance [4]. Today, most industrial verification languages, such as PSL [5], CBV [6] and e [7], include constructs to specify constraints.As hundreds of constraints can be necessary to model the environment of commercial designs, in recent years most of the research efforts have focused on two main paths. Along the first one, researchers concentrated on how to encode and represent design constraints [6], [7]. On the second one, research groups have focused on efficient algorithms to synthesize constraints, i.e., to derive them automatically from specifications [8], [9].In this work, our main target is to show how to effectively exploit constraints to improve the performance of model checking algorithms. To the best of our knowledge, the number of scientific works specifically addressing this issue is very