This paper presents a 28 GHz QVC used in an 81-86 GHz E-band transceiver. Eusing e.g. 16 QAM modulation schemes are sen error. Already a three degree error significantly error rate, and careful control of the phase err QVCO is therefore required. In the presented error can be tuned using four varactors, each co the QVCO outputs. The phase error is detec coupled active mixers, creating a DC-level pr phase error. The accuracy of the detector has Monte Carlo simulations showing a 3 sigma p degree. The QVCO is designed in a SiG f T = 200 GHz. The current consumption is 14 supply and 57 mA from a 2.5 V supply. The dedicated to the detector and output buffers. A phase noise equals -105 dBc/Hz with a FOM of a FOM T of -186 dBc/Hz. The die area equals 1.3

This paper presents a 2.45 GHz wake-up receiver front-end intended for use in sensor networks, and is designed to receive data modulated with on-off-keying. Manufactured in 65 nm CMOS it employs an uncertain IF structure with threephase passive mixer and high gain amplifier chain. With the modulation frequency response tailored to the detector behavior, it achieves a sensitivity of −88 dBm at BER of 10 −3 with a data rate of 250kbps. Operating on a 0.75 V supply it has a power consumption of just 50 µW. It provides a 50 Ω input match completely on-chip using a compact inductor and has an active area of just 0.07 mm 2 .

A receiver architecture suitable for devices in wireless body area networks is presented. Such devices require minimum physical size and power consumption. To achieve this the receiver should therefore be fully integrated in state-of-the-art CMOS technology, and size and power consumption must be carefully considered at all levels of design. The chosen modulation is frequency shift keying, for which transmitters can be realized with high efficiency and low spurious emissions. A directconversion receiver architecture is used to achieve minimum power consumption and a modulation index equal to two is chosen, creating a mid-channel notch in the modulated signal. A tailored demodulation structure has been designed to make the digital baseband compact and low power. To increase sensitivity it has been designed to interface with an analog decoder. Implementation in the analog domain minimizes the decoder power consumption. Antenna design and wave propagation are taken into account via simulations with phantoms. The 2.45 GHz ISM band was chosen as a good compromise between antenna size and link loss. An ultra-low power medium access scheme has been designed, which is used both for system evaluation and for assisting system design choices. Receiver blocks have been fabricated in 65-nm CMOS, and an RF front-end and an analogto-digital converter have been measured. Simulations of the complete baseband have been performed, investigating impairments due to 1/f noise, frequency and time offsets. Index Terms-Body sensor networks, CMOS integrated circuits, Low power electronics, Receivers, System-on-a-chip I. INTRODUCTION HERE are numerous applications for ultra-low power wireless communication. For instance, it can benefit such different areas as health care [1] and smart buildings [2], [3]. To achieve ultra-low power consumption it is important to combine low-power transceiver circuits with optimized communication protocols. In medical implants this is critical Manuscript received October 6, 2011.

No abstract