IC pad damage from a wafer probe can be detrimental to wire-bond yield and product reliability. In this paper, bond pads are harshly probed on traditional pads and a variety of experimental circuit-under-pad (CUP) structures in technologies having aluminum (Al) metallization and silicon dioxide (SiO 2 ) dielectric films. Probe marks and cracking behavior are analyzed, seeking process margins for high-reliability products. Results follow the well-known dependencies on chuck overdrive, probe touch counts, and cantilever probe tip length. Additional detail is revealed regarding the probe mark area, the interaction of cracks with top vias, sublayer film deformation that leads to cracks, and decreased cracking with increased pad Al thickness. The presence of a full sheet of metal in a pad sublayer dominates the top SiO 2 cracking performance in the pad. A dramatic improvement in robustness to cracking is seen as the bond pad sublayer metal films reduce in pattern density. Deformation or ripple in metal sublayer features can be prevented or minimized, thus preventing bending and cracking of the top SiO 2 and increasing the capability for high-reliability CUP pads. Based on these experimental results, CUP pad objectives can be achieved even with harsh probing on thin pad Al.Index Terms-Bond pad cracking, circuit under pad, pad ripple effect, probe mark, wafer probe.

IC bond pad structural reliability is studied for a variety of experimental pad designs in a 0.18um technology, having patterned metallization to simulate bond-over-active-circuitry (BOAC) situations in top-metal-minus-one and below. Underlying films deformation after wire bond is studied by optical microscopy after removal of the pad Al, with additional measurements by FIB. Pad designs in this study are rated for robustness to cracking according to an optical “ripple effect” deformation scale. “Ripple” is so named because it has a similar appearance to water ripples. It is due to non-uniform deformation in the underlying Al film(s) in the pad structure. Though the Al material is fully constrained within the SiO2 dielectric body, it is able to migrate plastically into local “hills and valleys” during bonding stress, with the top dielectric film bending in conformance. Cracks can then initiate in the undulating upper dielectric when its tensile strength is exceeded. “Ripple” in these pads is seen to vary depending upon the underlying metallization pattern and density as well as with wire bonding stress, for a fixed pad Al thickness. Traditional-style Al metallization pad structures with full metal plates are least robust, being the most prone to high “ripple” and cracks. Other pad structures more indicative of BOAC designs show varying degrees of improved robustness to cracking as shown by decreasing “ripple”. Results show that significant improvements in pad robustness to cracking are feasible in BOAC designs which include top-metal-minus-one routing in Al-metallization technologies, while providing increased process margin in wire bond, permitting efficient use of die area without extra processing or new issues.

This paper discusses layout design rules for successful Cu wire bond-over-active-circuitry (BOAC) in 0.18 micron and other IC technologies having Al metallization interconnects (two-level metal and up) in SiO2 dielectric, with W vias. The resulting bond pad structures effectively address BOAC pad reliability concerns, permitting Au or Cu wire bonding on relatively thin top metal. Cu wire bond is attractive on BOAC designs for lower cost than Au wire, while improving the thermal capability of the product. But Cu wire bond has presented even more challenges than Au wire bond due to higher stress to the pads during bonding, typically leading to increases in underlying films deformation and cracking. The new BOAC pad layout rules are based on the physical thin films principles, substantiated and refined through analysis of a large volume of experimental and product qualification data in various IC technologies. Interconnect layout beneath pads which follows the BOAC design rules creates more robust bond pad structures, preventing Al films deformation while strengthening the dielectric against cracking, and permitting free-form Si device design beneath. Substantial freedom in interconnect design is permitted in all metal layers beneath the pad, but the rules for top via and top-metal-minus-one layers are more restrictive than the rest. The BOAC design rules do not require any changes in wafer processing, they do not prevent the adding of redistribution or other layers for solder bumping or the like, but they do enable smaller die size and less expensive wire bond without jeopardizing bonding reliability.