At present, the research on the technology of mobile robot navigation is under the spotlight. This paper introduces ZigBee technology into mobile robot's research, and constructs an experimental system for robot navigation based on ZigBee wireless sensor network localization technology. In this system, robot added a ZigBee module takes the position as a blind node in ZigBee network, which forms a wireless location network, together with other ZigBee reference nodes. Combined with several other algorithms like robot obstacle avoidance algorithm and navigation algorithm, it realizes the position and navigation of mobile robot. The experiment result shows that the ZigBee-based robot position and navigation method discussed in this paper can meet the requirements of mobile robot navigation applications.

To achieve autonomous indoor mobile robot navigation, the robot needs to identify the direction, obstacle position and other information. This paper describes a solution for indoor mobile robot navigation and obstacle distance detection which based on monocular vision. We use Hough transform to find the straight lines in the corridor environment which were used to find the vanishing point as the navigation direction for the mobile robot. At the same time, use the priori knowledge of the corridor environment and the pinhole camera model to calculate the distance of the obstacle. Test results on our robot system show that the algorithm presented in this paper can detect the direction of the corridor and estimate the obstacle distance accuracy. This algorithm is relatively simple with high real-time ability and robustness

Clock jitter has become a problem for integrating IP cores and peripheral devices into a single synchronous SoC. In this paper, we propose an on-chip clock jitter detect circuit to enhance design flexibility, which only consists of twelve transistors and two minor capacitors. The proposed circuit transforms the clock jitter error to deviation of voltage (TVC) but has no use of constant current source and analog-to-digital converter (ADC). It is more convenient in contrast with the conservative clock fault detection structure methodology and is easy to be integrated in to SoC applications. Simulationbased results show that the proposed circuit can detect clock jitter fault on-chip and its maximal frequency can reach 1.5GHz.

One of the major obstacles encountered in design of a system on chip (SoC) arises from the high fault rate of clock distribution network in embedded intellectual property (IP) cores. With technology scaling, the geometries of devices approach its physical limits of operation, SoCs will be susceptible to various noise sources such as crosstalk, coupling noise, process variations, etc. Designing such a system under uncertainty becomes a challenge, as it is difficult to predict the time behavior of the system. Conservative design methodologies that consider all possible faults due to the noise sources, targeting safe system operation under all conditions will cause poor system performance. By contraries, aggressive design approach that can provide resilience against such timing faults without much additional hardware, is toughly required for maximizing system performance. In this paper we present an aggressive method to on-line detect the jitter faults on the clock signal that are due to defects caused by noise for high speed SoCs. Only fourteen MOS transistors and two minor capacitors are used for the circuit. The technique of time-to-voltage conversion is employed for transforming the time jitter error to variable voltage, which is more convenient in contrast with the conservative clock fault tolerance structure methodology. The circuit proposed can detect the jitter error of the digital clock signal faults with different applications. We have formally evaluated the meta-stability of our technique, which shows that our technique reliably meets the timing requirements. The simulation-based results show that the proposed circuit can be integrated into the nano-electronic SoCs applications to achieve the on-line clock jitter fault detection, and its maximal frequency can reach 800MHz. Furthermore, fault injection experiments show that our technique can tolerate all single faults on clock sources that lead to permanent stuck-at fault and masks almost 49 percents of intermittent faults.

No abstract