Abstract-Stereo vision is a methodology to obtain depth in a scene based on the stereo image pair. In this paper we introduce a Discrete Wavelet Transform (DWT) based methodology for a state-of-the-art disparity estimation algorithm, that resulted in significant performance improvement in terms of speed and computational complexity. In the initial stage of the proposed algorithm, we apply DWT to the input images, reducing the number of samples to be processed in subsequent stages by 50%, thereby decreasing computational complexity and improving processing speed. Subsequently the architecture has been designed based on this proposed methodology and prototyped on a Xilinx Virtex-7 FPGA. The performance of the proposed methodology has been evaluated against four standard Middlebury Benchmark image pairs viz. Tsukuba, Venus, Teddy and Cones. The proposed methodology results in improvement of about 44.4% cycles per frame, 52% frames per second and 61.5% and 59.6% LUT and register utilization respectively, compared with state-of-the-art designs.

This paper describes a mixed-signal electrocardiogram (ECG) system for personalized and remote cardiac health monitoring. The novelty of this paper is fourfold. First, a low power analog front end with an efficient automatic gain control mechanism, maintaining the input of the ADC to a level rendering optimum SNR and the enhanced recyclic folded cascode opamp used as an integrator for ADC. Second, a novel on-the-fly PQRST boundary detection (BD) methodology is formulated for finding the boundaries in continuous ECG signal. Third, a novel low-complexity ECG feature extraction architecture is designed by reusing the same module present in the proposed BD methodology. Fourth, the system is having the capability to reconfigure the proposed low power ADC for low (8 b) and high (12 b) resolution with the use of the feedback signal obtained from the digital block when it is in processing. The proposed system has been tested and validated on patient's data from PTBDB, CSEDB, and in-house IIT Hyderabad Data Base (IITHDB) and we have achieved an accuracy of 99% upon testing on various normal and abnormal ECG signals. The whole system is implemented in 180-nm technology resulting in 9.47-µW (at 1 MHz) power consumption and occupying 1.74-mm 2 silicon area.

We propose a low complexity architecture for cyberphysical system (CPS) model identification based on multiplemodel adaptive estimation (MMAE) algorithms. The complexity reduction is achieved by reducing the number of multiplications in the filter banks of the MMAE algorithm present in the cyber component of the CPS. The architecture has been implemented using FPGA for 16, 32, 64 filter banks as part of position and velocity estimations of autonomous automobile application. It has been found up to 78% reduction in multiplications is possible, which translates to the reduction of 39% LUTs, 13% FFs, 27% DSPs, and 43% power reduction when compared with the conventional architecture (without multiplications reduction) at 100MHz operating frequency. Furthermore, the proposed architecture is able to identify accurate model of automobile application just within 510ns, in the presence of external disturbances and abrupt changes.

No abstract

No abstract