Repeated spike treatment ͑RST͒, which was characterized by setting the temperature to ramp up and down repeatedly, was employed to study the stress effect on wafers by annealing the silicon wafers in ambient N 2 , followed by oxidation in O 2 . These RSTϩO samples had three apparent local thick oxide regions that adjoined the contacts of the three-pin quartz holder, as opposed to the typicalϩO samples annealed with a conventional temperature profile before the same oxidation process. It was observed that defects could be created on the silicon surface due to the high thermal stress at contacts during RST, and that the oxidation rate of these damaged zones was greatly increased. I-V data show that for a similar oxide thickness, the leakage currents in RSTϩO samples are higher and more scattered than those in typicalϩO samples. C-V measurements illustrate that RSTϩO samples have higher interface state densities than typicalϩO samples. These enhanced degradation phenomena could be caused by the RST, which resulted in a rough Si/SiO 2 interface and nonuniform oxide thickness.

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