Localized impurities doped in the semiconductor substrate of nanostructure devices play an essential role in understanding and resolving transport and variability issues in device characteristics. Modeling discrete impurities under the framework of device simulations is, therefore, an urgent need for reliable prediction of device performance via device simulations. In the present paper, we discuss the details of the physics associated with localized impurities in nanostructure devices, which are inherent, yet nontrivial, to any device simulation schemes: The physical interpretation and the role of electrostatic Coulomb potential in device simulations are clarified. We then show that a naive introduction of localized impurities into the Poisson equation leads to a logical inconsistency within the framework of the drift-diffusion simulations. We describe a systematic methodology for how to treat the Coulomb potential consistently with both the Poisson and current-continuity (transport) equations. The methodology is extended to the case of nanostructure devices so that the effects of the interface between different materials are taken into account.
We proposed a Digital Crosstalk Reduction (DCR) method to suppress optical crosstalk in 3D display without using any extra hardware components. Furthermore, DCR method can be applied to most of the 3D display technologies. In this paper, a 17-inch pattern retarder stereoscopic display and a 12-views autostereoscopic display were verified to yield less crosstalk by applying DCR method.
The optical properties in the patterned retarder system are discussed and calculated. The general equation is derived which helped to build a platform simulating the optical performance of patterned retarder 3D display. With this platform, the designers can optimize parameters to improve viewing quality and drastically save time and cost. i J J i J J
The random telegraph noise (RTN) time constants, capture (τc) and emission (τe) times, have been extensively used to identify the trap position in the gate oxide by comparing the measured τc-over-τe ratio with the Shockley–Read–Hall (SRH) statistics. However, various factors have been shown to affect the accuracy of the extracted trap depth from the SRH-type models, such as three-dimensional (3D) device electrostatics, atomistic doping, metal gate granularity, and Coulomb energy variation (CEV) of the trap. Focusing on CEV in this work, we assume the trap in gate oxide can be regarded as a floating island and then numerically studied the CEV of the trap with 3D drift-diffusion simulation. Analyzing the simulation data, the extracted trap depth without considering CEV in the SRH statistics are quantitatively compared with the data involved CEV.
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